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path: root/utils/TableGen/EDEmitter.cpp
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* ARM: NEON SHLL instruction immediate operand range checking.Jim Grosbach2011-12-071-0/+6
* ARM NEON VEXT aliases for data type suffices.Jim Grosbach2011-12-021-0/+2
* ARM parsing for VLD1 two register all lanes, no writeback.Jim Grosbach2011-11-301-0/+1
* llvm_unreachable() is not for user diagnostics....Jim Grosbach2011-11-301-1/+1
* ARM parsing aliases for VLD1 single register all lanes.Jim Grosbach2011-11-301-0/+1
* Add vmov.f32 to materialize f32 immediate splats which cannot be handled byEvan Cheng2011-11-151-0/+1
* Assembly parsing for 2-register sequential variant of VLD2.Jim Grosbach2011-10-211-0/+1
* Assembly parsing for 4-register variant of VLD1.Jim Grosbach2011-10-211-0/+1
* Assembly parsing for 3-register variant of VLD1.Jim Grosbach2011-10-211-0/+1
* ARM VLD parsing and encoding.Jim Grosbach2011-10-211-0/+1
* ARM VTBL (one register) assembly parsing and encoding.Jim Grosbach2011-10-181-0/+1
* ARM assembly parsing and encoding for VMOV.i64.Jim Grosbach2011-10-181-0/+1
* ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32.Jim Grosbach2011-10-181-0/+2
* ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16.Jim Grosbach2011-10-171-0/+1
* ARM NEON "vmov.i8" immediate assembly parsing and encoding.Jim Grosbach2011-10-171-0/+1
* ARM parsing and encoding for the <option> form of LDC/STC instructions.Jim Grosbach2011-10-121-0/+1
* Emit full ED initializers even for pseudo-instructions.Jakob Stoklund Olesen2011-10-101-14/+14
* Insert dummy ED table entries for pseudo-instructions.Jakob Stoklund Olesen2011-10-101-3/+3
* ARM NEON assembly parsing and encoding for VDUP(scalar).Jim Grosbach2011-10-071-0/+3
* Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This w...Craig Topper2011-10-061-0/+3
* Move TableGen's parser and entry point into a libraryPeter Collingbourne2011-10-011-1/+1
* ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.Owen Anderson2011-09-261-0/+1
* Thumb2 assembly parsing and encoding for TBB/TBH.Jim Grosbach2011-09-191-0/+2
* Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.Jim Grosbach2011-09-091-0/+1
* Thumb2 assembly parsing and encoding for LDRBT.Jim Grosbach2011-09-071-0/+1
* Thumb2 parsing and encoding for LDR(immediate).Jim Grosbach2011-09-071-0/+1
* Improve encoding support for BLX with immediat eoperands, and fix a BLX decod...Owen Anderson2011-08-261-0/+1
* Thumb parsing and encoding support for ADD SP instructions.Jim Grosbach2011-08-241-1/+2
* Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.Jim Grosbach2011-08-241-0/+1
* Create a new register class for the set of all GPRs except the PC. Use it to...Owen Anderson2011-08-091-0/+1
* Fix encodings for Thumb ASR and LSR immediate operands. They encode the rang...Owen Anderson2011-08-081-0/+2
* LDCL_POST and STCL_POST need one's-complement offsets, rather than two's comp...Owen Anderson2011-08-041-0/+1
* ARM refactoring assembly parsing of memory address operands.Jim Grosbach2011-08-031-2/+4
* ARM: rename addrmode7 to addr_offset_none.Jim Grosbach2011-08-021-1/+1
* Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates.Kevin Enderby2011-07-271-0/+1
* Split am2offset into register addend and immediate addend forms, necessary fo...Owen Anderson2011-07-261-1/+2
* ARM parsing and encoding for SVC instruction.Jim Grosbach2011-07-261-0/+1
* ARM assembly parsing and encoding for SSAT16 instruction.Jim Grosbach2011-07-251-0/+1
* ARM SSAT instruction 5-bit immediate handling.Jim Grosbach2011-07-221-1/+1
* Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn n...Owen Anderson2011-07-211-4/+6
* Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowi...Owen Anderson2011-07-211-1/+2
* ARM PKH shift ammount operand printing tweaks.Jim Grosbach2011-07-201-0/+2
* ARM assembly parsing for MOV (immediate).Jim Grosbach2011-07-191-0/+1
* Range checking for CDP[2] immediates.Jim Grosbach2011-07-131-0/+2
* Give the ARM BKPT instruction the right operand type.Jim Grosbach2011-07-131-0/+1
* Resynchronize EDInfo.h and EDEmitter.cpp.Shantonu Sen2011-07-111-14/+13
* Don't require pseudo-instructions to carry encoding information.Jim Grosbach2011-07-061-0/+5
* ARM Assembly support for Thumb mov-immediate.Jim Grosbach2011-06-271-0/+1
* Fix ssat and ssat16 encodings for ARM and Thumb. The bit position valueBruno Cardoso Lopes2011-05-311-0/+1
* Fixed MC encoding for index_align for VLD1/VST1 (single element from one lane...Mon P Wang2011-05-091-0/+1