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path: root/utils/TableGen/EDEmitter.cpp
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* ARM refactoring assembly parsing of memory address operands.Jim Grosbach2011-08-031-2/+4
* ARM: rename addrmode7 to addr_offset_none.Jim Grosbach2011-08-021-1/+1
* Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates.Kevin Enderby2011-07-271-0/+1
* Split am2offset into register addend and immediate addend forms, necessary fo...Owen Anderson2011-07-261-1/+2
* ARM parsing and encoding for SVC instruction.Jim Grosbach2011-07-261-0/+1
* ARM assembly parsing and encoding for SSAT16 instruction.Jim Grosbach2011-07-251-0/+1
* ARM SSAT instruction 5-bit immediate handling.Jim Grosbach2011-07-221-1/+1
* Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn n...Owen Anderson2011-07-211-4/+6
* Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowi...Owen Anderson2011-07-211-1/+2
* ARM PKH shift ammount operand printing tweaks.Jim Grosbach2011-07-201-0/+2
* ARM assembly parsing for MOV (immediate).Jim Grosbach2011-07-191-0/+1
* Range checking for CDP[2] immediates.Jim Grosbach2011-07-131-0/+2
* Give the ARM BKPT instruction the right operand type.Jim Grosbach2011-07-131-0/+1
* Resynchronize EDInfo.h and EDEmitter.cpp.Shantonu Sen2011-07-111-14/+13
* Don't require pseudo-instructions to carry encoding information.Jim Grosbach2011-07-061-0/+5
* ARM Assembly support for Thumb mov-immediate.Jim Grosbach2011-06-271-0/+1
* Fix ssat and ssat16 encodings for ARM and Thumb. The bit position valueBruno Cardoso Lopes2011-05-311-0/+1
* Fixed MC encoding for index_align for VLD1/VST1 (single element from one lane...Mon P Wang2011-05-091-0/+1
* Remove unused STL header includes.Jay Foad2011-04-231-1/+0
* Add asm parsing support w/ testcases for strex/ldrex family of instructionsBruno Cardoso Lopes2011-03-241-0/+4
* Thumb2 PC-relative loads require a fixup rather than just an immediate.Owen Anderson2011-03-181-0/+1
* Rename the narrow shift right immediate operands to "shr_imm*" operands. AlsoBill Wendling2011-03-071-3/+4
* Narrow right shifts need to encode their immediates differently from a normalBill Wendling2011-03-011-0/+3
* Fix encoding and add parsing support for the arm/thumb CPS instruction:Bruno Cardoso Lopes2011-02-141-0/+2
* Teach ARM/MC/ELF to handle R_ARM_JUMP24 relocation type for conditional jumps.Jason W Kim2011-02-041-0/+7
* TableGen: PointerLikeRegClass can be accepted to operand.NAKAMURA Takumi2011-01-261-1/+2
* Add support for parsing and encoding ARM's official syntax for the BFI instru...Bruno Cardoso Lopes2011-01-181-0/+2
* Add support to the ARM MC infrastructure to support mcr and friends. This req...Owen Anderson2011-01-131-0/+2
* Model :upper16: and :lower16: as ARM specific MCTargetExpr. This is a stepEvan Cheng2011-01-131-1/+1
* Add support for MC-ized encoding of tLEApcrel and tLEApcrelJT. rdar://8755755Jim Grosbach2010-12-141-0/+1
* The tLDR et al instructions were emitting either a reg/reg or reg/immBill Wendling2010-12-141-6/+8
* Second attempt at make Thumb2 LEAs pseudos. This time, perform the lowering ...Owen Anderson2010-12-141-0/+1
* Revert r121721, which broke buildbots.Owen Anderson2010-12-131-1/+0
* Make Thumb2 LEA-like instruction into pseudos, which map down to ADR. Provid...Owen Anderson2010-12-131-0/+1
* In Thumb2, direct branches can be encoded as either a "short" conditional bra...Owen Anderson2010-12-131-0/+2
* eliminate the Records global variable, patch by Garrison Venn!Chris Lattner2010-12-131-1/+1
* Thumb unconditional branch binary encoding. rdar://8754994Jim Grosbach2010-12-101-0/+1
* Thumb conditional branch binary encodings. rdar://8745367Jim Grosbach2010-12-101-0/+1
* Thumb needs a few different encoding schemes for branch targets. RenameJim Grosbach2010-12-091-1/+1
* The BLX instruction is encoded differently than the BL, because why not? InBill Wendling2010-12-091-0/+1
* Support the "target" encodings for the CB[N]Z instructions.Bill Wendling2010-12-081-1/+2
* Add support for loading from a constant pool.Bill Wendling2010-12-081-0/+2
* Add fixup for Thumb1 BL/BLX instructions.Jim Grosbach2010-12-061-0/+1
* Refactor LEApcrelJT as a pseudo-instructionlowered to a cannonical ADRJim Grosbach2010-12-011-0/+1
* Simplify the encoding of reg+/-imm12 values that allow PC-relative encoding. ...Owen Anderson2010-11-301-2/+0
* Add encoding support for Thumb2 PLD and PLI instructions.Owen Anderson2010-11-301-0/+2
* Fix the encoding of VLD4-dup alignment.Bob Wilson2010-11-301-0/+1
* Fix .o emission of ARM movt/movw. MCSymbolRefExpr::VK_ARM_(HI||LO)16 for the ...Jason W Kim2010-11-181-0/+1
* Proper encoding for VLDM and VSTM instructions. The register lists for theseBill Wendling2010-11-171-0/+4
* ARM fixup encoding for direct call instructions (BL).Jim Grosbach2010-11-111-0/+2
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