external_llvm.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	Mark the x86 machine model as incomplete. PR17367.	Andrew Trick	2013-09-25	1	-0/+5
*	Support BufferSize on ProcResGroup for unified MOp schedulers.	Andrew Trick	2013-06-15	1	-5/+1
*	Machine Model: Add MicroOpBufferSize and resource BufferSize.	Andrew Trick	2013-06-15	1	-10/+7
*	SubtargetEmitter fix	Arnold Schwaighofer	2013-06-05	1	-1/+1
*	Revert series of sched model patches until I figure out what is going on.	Arnold Schwaighofer	2013-06-04	1	-1/+1
*	SubtargetEmitter fix	Arnold Schwaighofer	2013-06-04	1	-1/+1
*	Machine model: Generate table entries for super-resources.	Andrew Trick	2013-04-23	1	-14/+23
*	Machine model: rewrite a tablegen loop to avoid comparing record pointers.	Andrew Trick	2013-04-23	1	-8/+4
*	TableGen SubtargetEmitter fix to allow A9 and Swift to coexist.	Andrew Trick	2013-03-26	1	-1/+16
*	Machine model. Allow mixed itinerary classes and SchedRW lists.	Andrew Trick	2013-03-16	1	-43/+35
*	Fix r177112: Add ProcResGroup.	Andrew Trick	2013-03-14	1	-1/+3
*	MachineModel: Add a ProcResGroup class.	Andrew Trick	2013-03-14	1	-12/+75
*	MIsched machine model: tablegen subtarget emitter improvement.	Andrew Trick	2013-03-01	1	-1/+14
*	MIsched: add an ILP window property to machine model.	Andrew Trick	2013-01-09	1	-0/+1
*	Sort the #include lines for utils/...	Chandler Carruth	2012-12-04	1	-3/+3
*	Fix a build problem with xlc. The error message was	Rafael Espindola	2012-11-02	1	-1/+1
*	Remove exception handling usage from tblgen.	Joerg Sonnenberger	2012-10-25	1	-7/+7
*	misched: Generate IsBuffered flag for machine resources.	Andrew Trick	2012-10-10	1	-4/+4
*	TableGen subtarget emitter, nearly first class support for SchedAlias.	Andrew Trick	2012-10-03	1	-8/+14
*	Cleanup TableGen subtarget emitter.	Andrew Trick	2012-10-03	1	-2/+6
*	Machine Model (-schedmodel only). Added SchedAliases.	Andrew Trick	2012-09-22	1	-22/+82
*	SchedMachineModel: compress the CPU's WriteLatencyTable.	Andrew Trick	2012-09-19	1	-7/+26
*	Replaced ReInitMCSubtargetInfo with InitMCProcessor.	Andrew Trick	2012-09-18	1	-1/+2
*	TableGen subtarget emitter. Generate resolveSchedClass generated hook for res...	Andrew Trick	2012-09-18	1	-0/+84
*	TableGen subtarget emitter. Remove unnecessary header dependence.	Andrew Trick	2012-09-18	1	-0/+1
*	TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...	Andrew Trick	2012-09-18	1	-6/+25
*	Backout the wrong subtarget emitter fix	Andrew Trick	2012-09-17	1	-1/+1
*	Fix release build after reverting	Andrew Trick	2012-09-17	1	-2/+1
*	Revert r164061-r164067. Most of the new subtarget emitter.	Andrew Trick	2012-09-17	1	-111/+8
*	InitMCProcessor	Andrew Trick	2012-09-17	1	-1/+2
*	TableGen subtarget emitter. Generate resolveSchedClass generated hook for res...	Andrew Trick	2012-09-17	1	-0/+84
*	TableGen subtarget emitter. Initialize MCSubtargetInfo with the new machine m...	Andrew Trick	2012-09-17	1	-7/+25
*	TableGen subtarget emitter. Format and emit data tables for the new machine m...	Andrew Trick	2012-09-17	1	-6/+117
*	TableGen subtarget emitter. Generate data tables for the new machine model.	Andrew Trick	2012-09-17	1	-2/+291
*	TableGen subtarget emitter. Emit processor resources for the new machine model.	Andrew Trick	2012-09-17	1	-10/+63
*	TableGen subtarget parser. Handle new machine model.	Andrew Trick	2012-09-15	1	-3/+3
*	Constify subtarget info properly so that we dont cast away the const in	Roman Divacky	2012-09-05	1	-1/+1
*	Added MispredictPenalty to SchedMachineModel.	Andrew Trick	2012-08-08	1	-0/+1
*	Fix a typo (the the => the)	Sylvestre Ledru	2012-07-23	1	-1/+1
*	Machine model: allow itineraries to be shared by different processor models.	Andrew Trick	2012-07-09	1	-0/+12
*	I'm introducing a new machine model to simultaneously allow simple	Andrew Trick	2012-07-07	1	-201/+160
*	Tweak spelling.	Andrew Trick	2012-07-07	1	-4/+4
*	Fix the C++11 build. I hate narrowing conversions.	Chandler Carruth	2012-07-02	1	-1/+1
*	Reapply "Make NumMicroOps a variable in the subtarget's instruction itinerary."	Andrew Trick	2012-07-02	1	-1/+1
*	Revert "Make NumMicroOps a variable in the subtarget's instruction itinerary."	Andrew Trick	2012-06-29	1	-1/+1
*	Make NumMicroOps a variable in the subtarget's instruction itinerary.	Andrew Trick	2012-06-29	1	-1/+1
*	Revert r158679 - use case is unclear (and it increases the memory footprint).	Hal Finkel	2012-06-22	1	-2/+2
*	Use "NoItineraries" for processors with no itineraries.	Andrew Trick	2012-06-22	1	-37/+41
*	Allow up to 64 functional units per processor itinerary.	Hal Finkel	2012-06-18	1	-2/+2
*	Add two newlines in ParseSubtargetFeatures's debug output after the CPU is pr...	Hal Finkel	2012-06-12	1	-1/+1