| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Remove some unnecessary filtering checks from X86 disassembler table build. | Craig Topper | 2011-11-19 | 1 | -35/+8 |
| * | More AVX2 instructions and their intrinsics. | Craig Topper | 2011-11-06 | 1 | -3/+6 |
| * | Add X86 RORX instruction | Craig Topper | 2011-10-23 | 1 | -14/+23 |
| * | Add X86 PEXTR and PDEP instructions. | Craig Topper | 2011-10-16 | 1 | -18/+27 |
| * | Add X86 BZHI instruction as well as BMI2 feature detection. | Craig Topper | 2011-10-16 | 1 | -13/+9 |
| * | Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMR... | Craig Topper | 2011-10-16 | 1 | -4/+0 |
| * | Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3... | Craig Topper | 2011-10-16 | 1 | -5/+18 |
| * | Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ... | Craig Topper | 2011-10-15 | 1 | -8/+50 |
| * | Add X86 ANDN instruction. Including instruction selection. | Craig Topper | 2011-10-14 | 1 | -0/+2 |
| * | Fix disassembling of popcntw. Also remove some code that says it accounts for... | Craig Topper | 2011-10-11 | 1 | -2/+8 |
| * | Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This w... | Craig Topper | 2011-10-06 | 1 | -0/+6 |
| * | Add support in the disassembler for ignoring the L-bit on certain VEX instruc... | Craig Topper | 2011-10-04 | 1 | -4/+7 |
| * | Fix disassembling of INVEPT and INVVPID to take operands | Craig Topper | 2011-10-01 | 1 | -0/+2 |
| * | Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2... | Craig Topper | 2011-10-01 | 1 | -6/+9 |
| * | Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes... | Craig Topper | 2011-09-23 | 1 | -3/+8 |
| * | Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND fr... | Craig Topper | 2011-09-14 | 1 | -5/+0 |
| * | Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from bein... | Craig Topper | 2011-09-13 | 1 | -3/+1 |
| * | Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SB... | Craig Topper | 2011-09-11 | 1 | -1/+1 |
| * | Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disasse... | Craig Topper | 2011-09-11 | 1 | -1/+2 |
| * | Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702. | Kevin Enderby | 2011-09-02 | 1 | -2/+5 |
| * | Add vvvv support to disassembling of instructions with MRMDestMem and MRMDest... | Craig Topper | 2011-08-30 | 1 | -4/+27 |
| * | Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217 | Kevin Enderby | 2011-08-29 | 1 | -2/+3 |
| * | Unconstify Inits | David Greene | 2011-07-29 | 1 | -3/+3 |
| * | [AVX] Constify Inits | David Greene | 2011-07-29 | 1 | -3/+3 |
| * | Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates. | Kevin Enderby | 2011-07-27 | 1 | -0/+2 |
| * | Make the disassembler able to disassemble a bunch of instructions with names ... | Eli Friedman | 2011-07-16 | 1 | -1/+25 |
| * | Revert r134921, 134917, 134908 and 134907. They're causing failures | Eric Christopher | 2011-07-11 | 1 | -3/+3 |
| * | [AVX] Make Inits Foldable | David Greene | 2011-07-11 | 1 | -3/+3 |
| * | Add support for the VIA PadLock instructions. | Joerg Sonnenberger | 2011-04-04 | 1 | -1/+17 |
| * | X86 table-generator and disassembler support for the AVX | Sean Callanan | 2011-03-15 | 1 | -48/+177 |
| * | Implement xgetbv and xsetbv. | Rafael Espindola | 2011-02-22 | 1 | -1/+3 |
| * | In Thumb2, direct branches can be encoded as either a "short" conditional bra... | Owen Anderson | 2010-12-13 | 1 | -0/+1 |
| * | factor the operand list (and related fields/operations) out of | Chris Lattner | 2010-11-01 | 1 | -3/+3 |
| * | Added the x86 instruction ud2b (2nd official undefined instruction). | Kevin Enderby | 2010-10-27 | 1 | -1/+0 |
| * | Fixed the disassembler to handle two new X86 | Sean Callanan | 2010-10-04 | 1 | -1/+16 |
| * | Massive rewrite of MMX: | Dale Johannesen | 2010-09-30 | 1 | -6/+0 |
| * | add basic avx support to the disassembler, also teach it about ssmem/sdmem | Chris Lattner | 2010-09-29 | 1 | -0/+6 |
| * | Add patterns for MMX that use the new intrinsics. | Dale Johannesen | 2010-09-07 | 1 | -1/+7 |
| * | Convert some tab stops into spaces. | Duncan Sands | 2010-07-12 | 1 | -1/+1 |
| * | Implement the major chunk of PR7195: support for 'callw' | Chris Lattner | 2010-07-07 | 1 | -0/+2 |
| * | More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm) | Bruno Cardoso Lopes | 2010-06-11 | 1 | -1/+8 |
| * | Reapply r105521, this time appending "LLU" to 64 bit | Bruno Cardoso Lopes | 2010-06-08 | 1 | -1/+7 |
| * | revert r105521, which is breaking the buildbots with stuff like this: | Chris Lattner | 2010-06-05 | 1 | -7/+1 |
| * | Initial AVX support for some instructions. No patterns matched | Bruno Cardoso Lopes | 2010-06-05 | 1 | -1/+7 |
| * | tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor | Daniel Dunbar | 2010-05-20 | 1 | -0/+4 |
| * | Eliminated the classification of control registers into %ecr_ | Sean Callanan | 2010-05-06 | 1 | -4/+2 |
| * | Fixed a bug where the disassembler would allow an immediate | Sean Callanan | 2010-04-07 | 1 | -1/+1 |
| * | Check in tablegen changes to fix disassembler related failures caused by r98465. | Evan Cheng | 2010-03-14 | 1 | -0/+1 |
| * | Changed the table generator so that the X86 | Sean Callanan | 2010-02-24 | 1 | -3/+4 |
| * | Added the rdtscp instruction to the x86 instruction | Sean Callanan | 2010-02-13 | 1 | -1/+2 |
