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* Improve the compression of the tablegen DiffLists by introducing a new sortChad Rosier2013-06-272-4/+10
* TableGen: Generate a function for getting operand indices based on their defi...Tom Stellard2013-06-251-0/+130
* Add support for encoding the HLE XACQUIRE and XRELEASE prefixes.Stefanus Du Toit2013-06-181-0/+6
* Support BufferSize on ProcResGroup for unified MOp schedulers.Andrew Trick2013-06-153-6/+18
* Machine Model: Add MicroOpBufferSize and resource BufferSize.Andrew Trick2013-06-151-10/+7
* tblgen: Assert that InstRWs doesn't grows when we don't expect it.Benjamin Kramer2013-06-101-0/+1
* tblgen: always lookup values from the original vector as it could be grown un...Benjamin Kramer2013-06-091-6/+6
* CodeGenSchedule: Use resize instead of copying a vectorArnold Schwaighofer2013-06-071-2/+2
* CodeGenSchedule: smallvector.push_back(smallvector[0]) is dangerousArnold Schwaighofer2013-06-061-1/+3
* Remove unimplemented definition. Found using [-Wunused-member-function].Jakub Staszak2013-06-061-2/+0
* SubtargetEmitter fixArnold Schwaighofer2013-06-051-1/+1
* Fix a tblgen subtargetemitter bug, for future Swift support.Andrew Trick2013-06-051-4/+23
* Revert series of sched model patches until I figure out what is going on.Arnold Schwaighofer2013-06-041-1/+1
* SubtargetEmitter fixArnold Schwaighofer2013-06-041-1/+1
* Make SubRegIndex size mandatory, following r183020.Ahmed Bougacha2013-05-313-7/+18
* Add a way to define the bit range covered by a SubRegIndex.Ahmed Bougacha2013-05-313-5/+36
* Remove the MCRegAliasIterator tables and compute the aliases dynamically.Chad Rosier2013-05-283-66/+3
* Recognize ValueType operands in source patterns for fast-isel.Bill Schmidt2013-05-221-3/+7
* Add TargetRegisterInfo::getCoveringLanes().Jakob Stoklund Olesen2013-05-163-6/+35
* Handle tied sub-operands in AsmMatcherEmitterUlrich Weigand2013-04-271-30/+19
* Machine model: Generate table entries for super-resources.Andrew Trick2013-04-231-14/+23
* Machine model: verify well-formed processor resource groups.Andrew Trick2013-04-232-0/+54
* Machine model: rewrite a tablegen loop to avoid comparing record pointers.Andrew Trick2013-04-231-8/+4
* [asm parser] Add support for predicating MnemonicAlias based on the assemblerChad Rosier2013-04-181-20/+45
* Add CLAC/STAC instruction encoding/decoding supportMichael Liao2013-04-111-17/+19
* Fix TableGen subtarget-emitter to handle A9/Swift.Andrew Trick2013-03-291-5/+11
* Revert r178166. According to Howard, this code is actually ok.Dan Gohman2013-03-291-3/+1
* Avoid undefined behavior from passing a std::vector's own contentsDan Gohman2013-03-271-1/+3
* TableGen SubtargetEmitter fix to allow A9 and Swift to coexist.Andrew Trick2013-03-262-2/+24
* x86 -- add the XTEST instructionDave Zarzycki2013-03-251-8/+9
* Allow types to be omitted in output patterns.Jakob Stoklund Olesen2013-03-242-0/+16
* Allow direct value types to be used in instruction 'set' patterns.Jakob Stoklund Olesen2013-03-241-2/+24
* Allow direct value types in pattern definitions.Jakob Stoklund Olesen2013-03-232-5/+29
* Make all unnamed RegisterClass TreePatternNodes typed MVT::i32.Jakob Stoklund Olesen2013-03-232-21/+21
* Add TableGen ctags(1) emitter and helper script.Sean Silva2013-03-215-1/+561
* Extend TableGen instruction selection matcher to improve handlingUlrich Weigand2013-03-192-11/+60
* TableGen fix for the new machine model.Andrew Trick2013-03-181-4/+6
* Extract a method.Jakob Stoklund Olesen2013-03-182-41/+42
* Use ArrayRef<MVT::SimpleValueType> when possible.Jakob Stoklund Olesen2013-03-176-10/+10
* Machine model. Allow mixed itinerary classes and SchedRW lists.Andrew Trick2013-03-163-205/+174
* Add SchedRW as an Instruction field.Jakob Stoklund Olesen2013-03-151-6/+6
* Fix r177112: Add ProcResGroup.Andrew Trick2013-03-141-1/+3
* MachineModel: Add a ProcResGroup class.Andrew Trick2013-03-142-12/+92
* Fixes disassembler crashes on 2013 Haswell RTM instructions.Kevin Enderby2013-03-111-0/+11
* MIsched machine model: tablegen subtarget emitter improvement.Andrew Trick2013-03-011-1/+14
* [TableGen] Fix ICE on MSVC 2012 Release builds.Michael J. Spencer2013-02-261-1/+3
* Fix for bug 15246 -- out-of-bound error in the TableGen backend, CodeGenMapTa...Jyotsna Verma2013-02-141-5/+4
* PR14992 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIADavid Peixotto2013-02-131-0/+1
* Added 0x0D to 2-byte opcode extension table for prefetch* variantsKay Tiong Khoo2013-02-121-0/+1
* Allow targets to add custom asm operand matching logic.Jim Grosbach2013-02-061-0/+9