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* Make the EDis tables const.Benjamin Kramer2012-02-111-5/+1
* Reuse the enum names from X86Desc in the X86Disassembler.Benjamin Kramer2012-02-111-1/+1
* Put instruction names into an indexed string table on the side, removing a po...Benjamin Kramer2012-02-101-2/+20
* Store just the SimpleValueType in the generated VT tables for each register c...Benjamin Kramer2012-02-091-1/+1
* Move the Name field in MCInstrDesc to the end, saving 8 bytes of padding per ...Benjamin Kramer2012-02-091-2/+3
* Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE...James Molloy2012-02-091-2/+76
* More tweaks to get the size of the X86 disassembler tables down.Craig Topper2012-02-091-7/+28
* Flatten some of the arrays in the X86 disassembler tables to reduce space nee...Craig Topper2012-02-091-38/+38
* Don't map registers to the invalid dwarf register (-1). It's the default value.Benjamin Kramer2012-02-081-0/+3
* Value initialize MCRegisterClasses. Not sure how could miss this during the M...Benjamin Kramer2012-02-081-2/+2
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-0511-41/+33
* Increment DFAStateEntryTable index for sentinel entry.Brendon Cahoon2012-02-031-1/+3
* Specify SubRegIndex components on the index itself.Jakob Stoklund Olesen2012-02-012-25/+77
* Fix a bug in the TopoOrderRC comparison function.Jakob Stoklund Olesen2012-02-011-1/+1
* Avoid emitting empty arrays, they're not standard C++.Jakob Stoklund Olesen2012-02-011-6/+11
* Don't assign a value to NUM_TARGET_NAMED_SUBREGS.Jakob Stoklund Olesen2012-01-311-2/+1
* Move the composite map into CodeGenSubRegIndex.Jakob Stoklund Olesen2012-01-313-30/+51
* Add a TableGen CodeGenSubRegIndex class.Jakob Stoklund Olesen2012-01-313-64/+144
* Tidy up. Trailing whitespace.Jim Grosbach2012-01-241-24/+24
* Widen the instruction encoder that TblGen emits to a 64 bits, which should ac...Owen Anderson2012-01-241-7/+7
* Add an (interleave A, B, ...) SetTheory operator.Jakob Stoklund Olesen2012-01-241-0/+19
* Add a CoveredBySubRegs property to Register descriptions.Jakob Stoklund Olesen2012-01-182-12/+41
* Add TableGen support for callee saved registers.Jakob Stoklund Olesen2012-01-173-0/+56
* Intel syntax: Ignore mnemonic aliases.Devang Patel2012-01-171-1/+3
* Provide better messages in llvm_unreachable.David Blaikie2012-01-171-1/+1
* Remove unreachable code. (replace with llvm_unreachable to help GCC where nec...David Blaikie2012-01-172-2/+2
* Removing unused default switch cases in switches over enums that already acco...David Blaikie2012-01-161-3/+0
* Skip the NAME field when forming tuples.Jakob Stoklund Olesen2012-01-131-0/+3
* Delete CodeInit and CodeRecTy from TableGen.Jakob Stoklund Olesen2012-01-132-4/+4
* Added MVT::v2f16Pete Cooper2012-01-121-0/+1
* Record asm variant id in MatchEntry and check it while matching instruction.Devang Patel2012-01-101-6/+14
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-104-5/+0
* Use descriptive variable name and remove incorrect operand number check.Devang Patel2012-01-091-12/+9
* Split AsmParser into two components - AsmParser and AsmParserVariantDevang Patel2012-01-093-77/+111
* Remove VectorExtras. This unused helper was written for a type of API that is...Benjamin Kramer2012-01-071-1/+0
* Fix TableGen so that it will emit the correct signature for FastEmit_f:Cameron Zwarich2012-01-071-1/+1
* Refactor.Devang Patel2012-01-071-38/+45
* Eliminate an error check that may not work with all asm syntax variants.Devang Patel2012-01-071-1/+2
* Do not hard code asm variant number.Devang Patel2012-01-051-2/+7
* Don't use enums larger than 1 << 31 for target features.Jakob Stoklund Olesen2012-01-031-16/+29
* Add disassembler support for VPERMIL2PD and VPERMIL2PS.Craig Topper2011-12-301-5/+9
* Add FMA4 instructions to disassembler.Craig Topper2011-12-302-1/+10
* ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).Jim Grosbach2011-12-221-0/+2
* ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.Jim Grosbach2011-12-211-0/+1
* Fix up the CMake build for the new files added in r146960, they'reChandler Carruth2011-12-201-0/+1
* Revert pragma clang suppressions that confuse GCC. (I'll worry about how to s...David Blaikie2011-12-201-5/+0
* Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_...David Blaikie2011-12-208-93/+142
* Add basic generic CodeGen support for half.Dan Gohman2011-12-202-0/+3
* Emit a getMatchingSuperRegClass() implementation for every target.Jakob Stoklund Olesen2011-12-193-2/+80
* Synthesize register classes for TRI::getMatchingSuperRegClass().Jakob Stoklund Olesen2011-12-192-0/+75