aboutsummaryrefslogtreecommitdiffstats
path: root/lib/MC/MachObjectWriter.cpp
blob: f2e91c26719929c8efe0d8b66268150f76d2bf56 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
//===- lib/MC/MachObjectWriter.cpp - Mach-O File Writer -------------------===//
//
//                     The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//

#include "llvm/MC/MCMachObjectWriter.h"
#include "llvm/ADT/OwningPtr.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/ADT/Twine.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCAsmLayout.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCSectionMachO.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/MCMachOSymbolFlags.h"
#include "llvm/MC/MCValue.h"
#include "llvm/Object/MachOFormat.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Target/TargetAsmBackend.h"

// FIXME: Gross.
#include "../Target/ARM/ARMFixupKinds.h"
#include "../Target/X86/X86FixupKinds.h"

#include <vector>
using namespace llvm;
using namespace llvm::object;

// FIXME: this has been copied from (or to) X86AsmBackend.cpp
static unsigned getFixupKindLog2Size(unsigned Kind) {
  switch (Kind) {
  default:
    llvm_unreachable("invalid fixup kind!");
  case FK_PCRel_1:
  case FK_Data_1: return 0;
  case FK_PCRel_2:
  case FK_Data_2: return 1;
  case FK_PCRel_4:
    // FIXME: Remove these!!!
  case X86::reloc_riprel_4byte:
  case X86::reloc_riprel_4byte_movq_load:
  case X86::reloc_signed_4byte:
  case FK_Data_4: return 2;
  case FK_Data_8: return 3;
  }
}

static bool doesSymbolRequireExternRelocation(MCSymbolData *SD) {
  // Undefined symbols are always extern.
  if (SD->Symbol->isUndefined())
    return true;

  // References to weak definitions require external relocation entries; the
  // definition may not always be the one in the same object file.
  if (SD->getFlags() & SF_WeakDefinition)
    return true;

  // Otherwise, we can use an internal relocation.
  return false;
}

namespace {

class MachObjectWriter : public MCObjectWriter {
  /// MachSymbolData - Helper struct for containing some precomputed information
  /// on symbols.
  struct MachSymbolData {
    MCSymbolData *SymbolData;
    uint64_t StringIndex;
    uint8_t SectionIndex;

    // Support lexicographic sorting.
    bool operator<(const MachSymbolData &RHS) const {
      return SymbolData->getSymbol().getName() <
             RHS.SymbolData->getSymbol().getName();
    }
  };

  /// The target specific Mach-O writer instance.
  llvm::OwningPtr<MCMachObjectTargetWriter> TargetObjectWriter;

  /// @name Relocation Data
  /// @{

  llvm::DenseMap<const MCSectionData*,
                 std::vector<macho::RelocationEntry> > Relocations;
  llvm::DenseMap<const MCSectionData*, unsigned> IndirectSymBase;

  /// @}
  /// @name Symbol Table Data
  /// @{

  SmallString<256> StringTable;
  std::vector<MachSymbolData> LocalSymbolData;
  std::vector<MachSymbolData> ExternalSymbolData;
  std::vector<MachSymbolData> UndefinedSymbolData;

  /// @}

private:
  /// @name Utility Methods
  /// @{

  bool isFixupKindPCRel(const MCAssembler &Asm, unsigned Kind) {
    const MCFixupKindInfo &FKI = Asm.getBackend().getFixupKindInfo(
      (MCFixupKind) Kind);

    return FKI.Flags & MCFixupKindInfo::FKF_IsPCRel;
  }

  /// @}

  SectionAddrMap SectionAddress;
  uint64_t getSectionAddress(const MCSectionData* SD) const {
    return SectionAddress.lookup(SD);
  }
  uint64_t getSymbolAddress(const MCSymbolData* SD,
                            const MCAsmLayout &Layout) const {
    return getSectionAddress(SD->getFragment()->getParent()) +
      Layout.getSymbolOffset(SD);
  }
  uint64_t getFragmentAddress(const MCFragment *Fragment,
                            const MCAsmLayout &Layout) const {
    return getSectionAddress(Fragment->getParent()) +
      Layout.getFragmentOffset(Fragment);
  }

  uint64_t getPaddingSize(const MCSectionData *SD,
                          const MCAsmLayout &Layout) const {
    uint64_t EndAddr = getSectionAddress(SD) + Layout.getSectionAddressSize(SD);
    unsigned Next = SD->getLayoutOrder() + 1;
    if (Next >= Layout.getSectionOrder().size())
      return 0;

    const MCSectionData &NextSD = *Layout.getSectionOrder()[Next];
    if (NextSD.getSection().isVirtualSection())
      return 0;
    return OffsetToAlignment(EndAddr, NextSD.getAlignment());
  }

public:
  MachObjectWriter(MCMachObjectTargetWriter *MOTW, raw_ostream &_OS,
                   bool _IsLittleEndian)
    : MCObjectWriter(_OS, _IsLittleEndian), TargetObjectWriter(MOTW) {
  }

  /// @name Target Writer Proxy Accessors
  /// @{

  bool is64Bit() const { return TargetObjectWriter->is64Bit(); }
  bool isARM() const {
    uint32_t CPUType = TargetObjectWriter->getCPUType() & ~mach::CTFM_ArchMask;
    return CPUType == mach::CTM_ARM;
  }

  /// @}

  void WriteHeader(unsigned NumLoadCommands, unsigned LoadCommandsSize,
                   bool SubsectionsViaSymbols) {
    uint32_t Flags = 0;

    if (SubsectionsViaSymbols)
      Flags |= macho::HF_SubsectionsViaSymbols;

    // struct mach_header (28 bytes) or
    // struct mach_header_64 (32 bytes)

    uint64_t Start = OS.tell();
    (void) Start;

    Write32(is64Bit() ? macho::HM_Object64 : macho::HM_Object32);

    Write32(TargetObjectWriter->getCPUType());
    Write32(TargetObjectWriter->getCPUSubtype());

    Write32(macho::HFT_Object);
    Write32(NumLoadCommands);
    Write32(LoadCommandsSize);
    Write32(Flags);
    if (is64Bit())
      Write32(0); // reserved

    assert(OS.tell() - Start ==
           (is64Bit() ? macho::Header64Size : macho::Header32Size));
  }

  /// WriteSegmentLoadCommand - Write a segment load command.
  ///
  /// \arg NumSections - The number of sections in this segment.
  /// \arg SectionDataSize - The total size of the sections.
  void WriteSegmentLoadCommand(unsigned NumSections,
                               uint64_t VMSize,
                               uint64_t SectionDataStartOffset,
                               uint64_t SectionDataSize) {
    // struct segment_command (56 bytes) or
    // struct segment_command_64 (72 bytes)

    uint64_t Start = OS.tell();
    (void) Start;

    unsigned SegmentLoadCommandSize =
      is64Bit() ? macho::SegmentLoadCommand64Size:
      macho::SegmentLoadCommand32Size;
    Write32(is64Bit() ? macho::LCT_Segment64 : macho::LCT_Segment);
    Write32(SegmentLoadCommandSize +
            NumSections * (is64Bit() ? macho::Section64Size :
                           macho::Section32Size));

    WriteBytes("", 16);
    if (is64Bit()) {
      Write64(0); // vmaddr
      Write64(VMSize); // vmsize
      Write64(SectionDataStartOffset); // file offset
      Write64(SectionDataSize); // file size
    } else {
      Write32(0); // vmaddr
      Write32(VMSize); // vmsize
      Write32(SectionDataStartOffset); // file offset
      Write32(SectionDataSize); // file size
    }
    Write32(0x7); // maxprot
    Write32(0x7); // initprot
    Write32(NumSections);
    Write32(0); // flags

    assert(OS.tell() - Start == SegmentLoadCommandSize);
  }

  void WriteSection(const MCAssembler &Asm, const MCAsmLayout &Layout,
                    const MCSectionData &SD, uint64_t FileOffset,
                    uint64_t RelocationsStart, unsigned NumRelocations) {
    uint64_t SectionSize = Layout.getSectionAddressSize(&SD);

    // The offset is unused for virtual sections.
    if (SD.getSection().isVirtualSection()) {
      assert(Layout.getSectionFileSize(&SD) == 0 && "Invalid file size!");
      FileOffset = 0;
    }

    // struct section (68 bytes) or
    // struct section_64 (80 bytes)

    uint64_t Start = OS.tell();
    (void) Start;

    const MCSectionMachO &Section = cast<MCSectionMachO>(SD.getSection());
    WriteBytes(Section.getSectionName(), 16);
    WriteBytes(Section.getSegmentName(), 16);
    if (is64Bit()) {
      Write64(getSectionAddress(&SD)); // address
      Write64(SectionSize); // size
    } else {
      Write32(getSectionAddress(&SD)); // address
      Write32(SectionSize); // size
    }
    Write32(FileOffset);

    unsigned Flags = Section.getTypeAndAttributes();
    if (SD.hasInstructions())
      Flags |= MCSectionMachO::S_ATTR_SOME_INSTRUCTIONS;

    assert(isPowerOf2_32(SD.getAlignment()) && "Invalid alignment!");
    Write32(Log2_32(SD.getAlignment()));
    Write32(NumRelocations ? RelocationsStart : 0);
    Write32(NumRelocations);
    Write32(Flags);
    Write32(IndirectSymBase.lookup(&SD)); // reserved1
    Write32(Section.getStubSize()); // reserved2
    if (is64Bit())
      Write32(0); // reserved3

    assert(OS.tell() - Start == (is64Bit() ? macho::Section64Size :
           macho::Section32Size));
  }

  void WriteSymtabLoadCommand(uint32_t SymbolOffset, uint32_t NumSymbols,
                              uint32_t StringTableOffset,
                              uint32_t StringTableSize) {
    // struct symtab_command (24 bytes)

    uint64_t Start = OS.tell();
    (void) Start;

    Write32(macho::LCT_Symtab);
    Write32(macho::SymtabLoadCommandSize);
    Write32(SymbolOffset);
    Write32(NumSymbols);
    Write32(StringTableOffset);
    Write32(StringTableSize);

    assert(OS.tell() - Start == macho::SymtabLoadCommandSize);
  }

  void WriteDysymtabLoadCommand(uint32_t FirstLocalSymbol,
                                uint32_t NumLocalSymbols,
                                uint32_t FirstExternalSymbol,
                                uint32_t NumExternalSymbols,
                                uint32_t FirstUndefinedSymbol,
                                uint32_t NumUndefinedSymbols,
                                uint32_t IndirectSymbolOffset,
                                uint32_t NumIndirectSymbols) {
    // struct dysymtab_command (80 bytes)

    uint64_t Start = OS.tell();
    (void) Start;

    Write32(macho::LCT_Dysymtab);
    Write32(macho::DysymtabLoadCommandSize);
    Write32(FirstLocalSymbol);
    Write32(NumLocalSymbols);
    Write32(FirstExternalSymbol);
    Write32(NumExternalSymbols);
    Write32(FirstUndefinedSymbol);
    Write32(NumUndefinedSymbols);
    Write32(0); // tocoff
    Write32(0); // ntoc
    Write32(0); // modtaboff
    Write32(0); // nmodtab
    Write32(0); // extrefsymoff
    Write32(0); // nextrefsyms
    Write32(IndirectSymbolOffset);
    Write32(NumIndirectSymbols);
    Write32(0); // extreloff
    Write32(0); // nextrel
    Write32(0); // locreloff
    Write32(0); // nlocrel

    assert(OS.tell() - Start == macho::DysymtabLoadCommandSize);
  }

  void WriteNlist(MachSymbolData &MSD, const MCAsmLayout &Layout) {
    MCSymbolData &Data = *MSD.SymbolData;
    const MCSymbol &Symbol = Data.getSymbol();
    uint8_t Type = 0;
    uint16_t Flags = Data.getFlags();
    uint32_t Address = 0;

    // Set the N_TYPE bits. See <mach-o/nlist.h>.
    //
    // FIXME: Are the prebound or indirect fields possible here?
    if (Symbol.isUndefined())
      Type = macho::STT_Undefined;
    else if (Symbol.isAbsolute())
      Type = macho::STT_Absolute;
    else
      Type = macho::STT_Section;

    // FIXME: Set STAB bits.

    if (Data.isPrivateExtern())
      Type |= macho::STF_PrivateExtern;

    // Set external bit.
    if (Data.isExternal() || Symbol.isUndefined())
      Type |= macho::STF_External;

    // Compute the symbol address.
    if (Symbol.isDefined()) {
      if (Symbol.isAbsolute()) {
        Address = cast<MCConstantExpr>(Symbol.getVariableValue())->getValue();
      } else {
        Address = getSymbolAddress(&Data, Layout);
      }
    } else if (Data.isCommon()) {
      // Common symbols are encoded with the size in the address
      // field, and their alignment in the flags.
      Address = Data.getCommonSize();

      // Common alignment is packed into the 'desc' bits.
      if (unsigned Align = Data.getCommonAlignment()) {
        unsigned Log2Size = Log2_32(Align);
        assert((1U << Log2Size) == Align && "Invalid 'common' alignment!");
        if (Log2Size > 15)
          report_fatal_error("invalid 'common' alignment '" +
                            Twine(Align) + "'");
        // FIXME: Keep this mask with the SymbolFlags enumeration.
        Flags = (Flags & 0xF0FF) | (Log2Size << 8);
      }
    }

    // struct nlist (12 bytes)

    Write32(MSD.StringIndex);
    Write8(Type);
    Write8(MSD.SectionIndex);

    // The Mach-O streamer uses the lowest 16-bits of the flags for the 'desc'
    // value.
    Write16(Flags);
    if (is64Bit())
      Write64(Address);
    else
      Write32(Address);
  }

  // FIXME: We really need to improve the relocation validation. Basically, we
  // want to implement a separate computation which evaluates the relocation
  // entry as the linker would, and verifies that the resultant fixup value is
  // exactly what the encoder wanted. This will catch several classes of
  // problems:
  //
  //  - Relocation entry bugs, the two algorithms are unlikely to have the same
  //    exact bug.
  //
  //  - Relaxation issues, where we forget to relax something.
  //
  //  - Input errors, where something cannot be correctly encoded. 'as' allows
  //    these through in many cases.

  static bool isFixupKindRIPRel(unsigned Kind) {
    return Kind == X86::reloc_riprel_4byte ||
      Kind == X86::reloc_riprel_4byte_movq_load;
  }
  void RecordX86_64Relocation(const MCAssembler &Asm, const MCAsmLayout &Layout,
                              const MCFragment *Fragment,
                              const MCFixup &Fixup, MCValue Target,
                              uint64_t &FixedValue) {
    unsigned IsPCRel = isFixupKindPCRel(Asm, Fixup.getKind());
    unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind());
    unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());

    // See <reloc.h>.
    uint32_t FixupOffset =
      Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
    uint32_t FixupAddress =
      getFragmentAddress(Fragment, Layout) + Fixup.getOffset();
    int64_t Value = 0;
    unsigned Index = 0;
    unsigned IsExtern = 0;
    unsigned Type = 0;

    Value = Target.getConstant();

    if (IsPCRel) {
      // Compensate for the relocation offset, Darwin x86_64 relocations only
      // have the addend and appear to have attempted to define it to be the
      // actual expression addend without the PCrel bias. However, instructions
      // with data following the relocation are not accomodated for (see comment
      // below regarding SIGNED{1,2,4}), so it isn't exactly that either.
      Value += 1LL << Log2Size;
    }

    if (Target.isAbsolute()) { // constant
      // SymbolNum of 0 indicates the absolute section.
      Type = macho::RIT_X86_64_Unsigned;
      Index = 0;

      // FIXME: I believe this is broken, I don't think the linker can
      // understand it. I think it would require a local relocation, but I'm not
      // sure if that would work either. The official way to get an absolute
      // PCrel relocation is to use an absolute symbol (which we don't support
      // yet).
      if (IsPCRel) {
        IsExtern = 1;
        Type = macho::RIT_X86_64_Branch;
      }
    } else if (Target.getSymB()) { // A - B + constant
      const MCSymbol *A = &Target.getSymA()->getSymbol();
      MCSymbolData &A_SD = Asm.getSymbolData(*A);
      const MCSymbolData *A_Base = Asm.getAtom(&A_SD);

      const MCSymbol *B = &Target.getSymB()->getSymbol();
      MCSymbolData &B_SD = Asm.getSymbolData(*B);
      const MCSymbolData *B_Base = Asm.getAtom(&B_SD);

      // Neither symbol can be modified.
      if (Target.getSymA()->getKind() != MCSymbolRefExpr::VK_None ||
          Target.getSymB()->getKind() != MCSymbolRefExpr::VK_None)
        report_fatal_error("unsupported relocation of modified symbol");

      // We don't support PCrel relocations of differences. Darwin 'as' doesn't
      // implement most of these correctly.
      if (IsPCRel)
        report_fatal_error("unsupported pc-relative relocation of difference");

      // The support for the situation where one or both of the symbols would
      // require a local relocation is handled just like if the symbols were
      // external.  This is certainly used in the case of debug sections where
      // the section has only temporary symbols and thus the symbols don't have
      // base symbols.  This is encoded using the section ordinal and
      // non-extern relocation entries.

      // Darwin 'as' doesn't emit correct relocations for this (it ends up with
      // a single SIGNED relocation); reject it for now.  Except the case where
      // both symbols don't have a base, equal but both NULL.
      if (A_Base == B_Base && A_Base)
        report_fatal_error("unsupported relocation with identical base");

      Value += getSymbolAddress(&A_SD, Layout) -
        (A_Base == NULL ? 0 : getSymbolAddress(A_Base, Layout));
      Value -= getSymbolAddress(&B_SD, Layout) -
        (B_Base == NULL ? 0 : getSymbolAddress(B_Base, Layout));

      if (A_Base) {
        Index = A_Base->getIndex();
        IsExtern = 1;
      }
      else {
        Index = A_SD.getFragment()->getParent()->getOrdinal() + 1;
        IsExtern = 0;
      }
      Type = macho::RIT_X86_64_Unsigned;

      macho::RelocationEntry MRE;
      MRE.Word0 = FixupOffset;
      MRE.Word1 = ((Index     <<  0) |
                   (IsPCRel   << 24) |
                   (Log2Size  << 25) |
                   (IsExtern  << 27) |
                   (Type      << 28));
      Relocations[Fragment->getParent()].push_back(MRE);

      if (B_Base) {
        Index = B_Base->getIndex();
        IsExtern = 1;
      }
      else {
        Index = B_SD.getFragment()->getParent()->getOrdinal() + 1;
        IsExtern = 0;
      }
      Type = macho::RIT_X86_64_Subtractor;
    } else {
      const MCSymbol *Symbol = &Target.getSymA()->getSymbol();
      MCSymbolData &SD = Asm.getSymbolData(*Symbol);
      const MCSymbolData *Base = Asm.getAtom(&SD);

      // Relocations inside debug sections always use local relocations when
      // possible. This seems to be done because the debugger doesn't fully
      // understand x86_64 relocation entries, and expects to find values that
      // have already been fixed up.
      if (Symbol->isInSection()) {
        const MCSectionMachO &Section = static_cast<const MCSectionMachO&>(
          Fragment->getParent()->getSection());
        if (Section.hasAttribute(MCSectionMachO::S_ATTR_DEBUG))
          Base = 0;
      }

      // x86_64 almost always uses external relocations, except when there is no
      // symbol to use as a base address (a local symbol with no preceeding
      // non-local symbol).
      if (Base) {
        Index = Base->getIndex();
        IsExtern = 1;

        // Add the local offset, if needed.
        if (Base != &SD)
          Value += Layout.getSymbolOffset(&SD) - Layout.getSymbolOffset(Base);
      } else if (Symbol->isInSection()) {
        // The index is the section ordinal (1-based).
        Index = SD.getFragment()->getParent()->getOrdinal() + 1;
        IsExtern = 0;
        Value += getSymbolAddress(&SD, Layout);

        if (IsPCRel)
          Value -= FixupAddress + (1 << Log2Size);
      } else if (Symbol->isVariable()) {
        const MCExpr *Value = Symbol->getVariableValue();
        int64_t Res;
        bool isAbs = Value->EvaluateAsAbsolute(Res, Layout, SectionAddress);
        if (isAbs) {
          FixedValue = Res;
          return;
        } else {
          report_fatal_error("unsupported relocation of variable '" +
                             Symbol->getName() + "'");
        }
      } else {
        report_fatal_error("unsupported relocation of undefined symbol '" +
                           Symbol->getName() + "'");
      }

      MCSymbolRefExpr::VariantKind Modifier = Target.getSymA()->getKind();
      if (IsPCRel) {
        if (IsRIPRel) {
          if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
            // x86_64 distinguishes movq foo@GOTPCREL so that the linker can
            // rewrite the movq to an leaq at link time if the symbol ends up in
            // the same linkage unit.
            if (unsigned(Fixup.getKind()) == X86::reloc_riprel_4byte_movq_load)
              Type = macho::RIT_X86_64_GOTLoad;
            else
              Type = macho::RIT_X86_64_GOT;
          }  else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
            Type = macho::RIT_X86_64_TLV;
          }  else if (Modifier != MCSymbolRefExpr::VK_None) {
            report_fatal_error("unsupported symbol modifier in relocation");
          } else {
            Type = macho::RIT_X86_64_Signed;

            // The Darwin x86_64 relocation format has a problem where it cannot
            // encode an address (L<foo> + <constant>) which is outside the atom
            // containing L<foo>. Generally, this shouldn't occur but it does
            // happen when we have a RIPrel instruction with data following the
            // relocation entry (e.g., movb $012, L0(%rip)). Even with the PCrel
            // adjustment Darwin x86_64 uses, the offset is still negative and
            // the linker has no way to recognize this.
            //
            // To work around this, Darwin uses several special relocation types
            // to indicate the offsets. However, the specification or
            // implementation of these seems to also be incomplete; they should
            // adjust the addend as well based on the actual encoded instruction
            // (the additional bias), but instead appear to just look at the
            // final offset.
            switch (-(Target.getConstant() + (1LL << Log2Size))) {
            case 1: Type = macho::RIT_X86_64_Signed1; break;
            case 2: Type = macho::RIT_X86_64_Signed2; break;
            case 4: Type = macho::RIT_X86_64_Signed4; break;
            }
          }
        } else {
          if (Modifier != MCSymbolRefExpr::VK_None)
            report_fatal_error("unsupported symbol modifier in branch "
                              "relocation");

          Type = macho::RIT_X86_64_Branch;
        }
      } else {
        if (Modifier == MCSymbolRefExpr::VK_GOT) {
          Type = macho::RIT_X86_64_GOT;
        } else if (Modifier == MCSymbolRefExpr::VK_GOTPCREL) {
          // GOTPCREL is allowed as a modifier on non-PCrel instructions, in
          // which case all we do is set the PCrel bit in the relocation entry;
          // this is used with exception handling, for example. The source is
          // required to include any necessary offset directly.
          Type = macho::RIT_X86_64_GOT;
          IsPCRel = 1;
        } else if (Modifier == MCSymbolRefExpr::VK_TLVP) {
          report_fatal_error("TLVP symbol modifier should have been rip-rel");
        } else if (Modifier != MCSymbolRefExpr::VK_None)
          report_fatal_error("unsupported symbol modifier in relocation");
        else
          Type = macho::RIT_X86_64_Unsigned;
      }
    }

    // x86_64 always writes custom values into the fixups.
    FixedValue = Value;

    // struct relocation_info (8 bytes)
    macho::RelocationEntry MRE;
    MRE.Word0 = FixupOffset;
    MRE.Word1 = ((Index     <<  0) |
                 (IsPCRel   << 24) |
                 (Log2Size  << 25) |
                 (IsExtern  << 27) |
                 (Type      << 28));
    Relocations[Fragment->getParent()].push_back(MRE);
  }

  void RecordScatteredRelocation(const MCAssembler &Asm,
                                 const MCAsmLayout &Layout,
                                 const MCFragment *Fragment,
                                 const MCFixup &Fixup, MCValue Target,
                                 unsigned Log2Size,
                                 uint64_t &FixedValue) {
    uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
    unsigned IsPCRel = isFixupKindPCRel(Asm, Fixup.getKind());
    unsigned Type = macho::RIT_Vanilla;

    // See <reloc.h>.
    const MCSymbol *A = &Target.getSymA()->getSymbol();
    MCSymbolData *A_SD = &Asm.getSymbolData(*A);

    if (!A_SD->getFragment())
      report_fatal_error("symbol '" + A->getName() +
                        "' can not be undefined in a subtraction expression");

    uint32_t Value = getSymbolAddress(A_SD, Layout);
    uint64_t SecAddr = getSectionAddress(A_SD->getFragment()->getParent());
    FixedValue += SecAddr;
    uint32_t Value2 = 0;

    if (const MCSymbolRefExpr *B = Target.getSymB()) {
      MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());

      if (!B_SD->getFragment())
        report_fatal_error("symbol '" + B->getSymbol().getName() +
                          "' can not be undefined in a subtraction expression");

      // Select the appropriate difference relocation type.
      //
      // Note that there is no longer any semantic difference between these two
      // relocation types from the linkers point of view, this is done solely
      // for pedantic compatibility with 'as'.
      Type = A_SD->isExternal() ? (unsigned)macho::RIT_Difference :
        (unsigned)macho::RIT_Generic_LocalDifference;
      Value2 = getSymbolAddress(B_SD, Layout);
      FixedValue -= getSectionAddress(B_SD->getFragment()->getParent());
    }

    // Relocations are written out in reverse order, so the PAIR comes first.
    if (Type == macho::RIT_Difference ||
        Type == macho::RIT_Generic_LocalDifference) {
      macho::RelocationEntry MRE;
      MRE.Word0 = ((0         <<  0) |
                   (macho::RIT_Pair  << 24) |
                   (Log2Size  << 28) |
                   (IsPCRel   << 30) |
                   macho::RF_Scattered);
      MRE.Word1 = Value2;
      Relocations[Fragment->getParent()].push_back(MRE);
    }

    macho::RelocationEntry MRE;
    MRE.Word0 = ((FixupOffset <<  0) |
                 (Type        << 24) |
                 (Log2Size    << 28) |
                 (IsPCRel     << 30) |
                 macho::RF_Scattered);
    MRE.Word1 = Value;
    Relocations[Fragment->getParent()].push_back(MRE);
  }

  void RecordARMScatteredRelocation(const MCAssembler &Asm,
                                    const MCAsmLayout &Layout,
                                    const MCFragment *Fragment,
                                    const MCFixup &Fixup, MCValue Target,
                                    unsigned Log2Size,
                                    uint64_t &FixedValue) {
    uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
    unsigned IsPCRel = isFixupKindPCRel(Asm, Fixup.getKind());
    unsigned Type = macho::RIT_Vanilla;

    // See <reloc.h>.
    const MCSymbol *A = &Target.getSymA()->getSymbol();
    MCSymbolData *A_SD = &Asm.getSymbolData(*A);

    if (!A_SD->getFragment())
      report_fatal_error("symbol '" + A->getName() +
                        "' can not be undefined in a subtraction expression");

    uint32_t Value = getSymbolAddress(A_SD, Layout);
    uint64_t SecAddr = getSectionAddress(A_SD->getFragment()->getParent());
    FixedValue += SecAddr;
    uint32_t Value2 = 0;

    if (const MCSymbolRefExpr *B = Target.getSymB()) {
      MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());

      if (!B_SD->getFragment())
        report_fatal_error("symbol '" + B->getSymbol().getName() +
                          "' can not be undefined in a subtraction expression");

      // Select the appropriate difference relocation type.
      Type = macho::RIT_Difference;
      Value2 = getSymbolAddress(B_SD, Layout);
      FixedValue -= getSectionAddress(B_SD->getFragment()->getParent());
    }

    // Relocations are written out in reverse order, so the PAIR comes first.
    if (Type == macho::RIT_Difference ||
        Type == macho::RIT_Generic_LocalDifference) {
      macho::RelocationEntry MRE;
      MRE.Word0 = ((0         <<  0) |
                   (macho::RIT_Pair  << 24) |
                   (Log2Size  << 28) |
                   (IsPCRel   << 30) |
                   macho::RF_Scattered);
      MRE.Word1 = Value2;
      Relocations[Fragment->getParent()].push_back(MRE);
    }

    macho::RelocationEntry MRE;
    MRE.Word0 = ((FixupOffset <<  0) |
                 (Type        << 24) |
                 (Log2Size    << 28) |
                 (IsPCRel     << 30) |
                 macho::RF_Scattered);
    MRE.Word1 = Value;
    Relocations[Fragment->getParent()].push_back(MRE);
  }

  void RecordARMMovwMovtRelocation(const MCAssembler &Asm,
                                   const MCAsmLayout &Layout,
                                   const MCFragment *Fragment,
                                   const MCFixup &Fixup, MCValue Target,
                                   uint64_t &FixedValue) {
    uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
    unsigned IsPCRel = isFixupKindPCRel(Asm, Fixup.getKind());
    unsigned Type = macho::RIT_ARM_Half;

    // See <reloc.h>.
    const MCSymbol *A = &Target.getSymA()->getSymbol();
    MCSymbolData *A_SD = &Asm.getSymbolData(*A);

    if (!A_SD->getFragment())
      report_fatal_error("symbol '" + A->getName() +
                        "' can not be undefined in a subtraction expression");

    uint32_t Value = getSymbolAddress(A_SD, Layout);
    uint32_t Value2 = 0;
    uint64_t SecAddr = getSectionAddress(A_SD->getFragment()->getParent());
    FixedValue += SecAddr;

    if (const MCSymbolRefExpr *B = Target.getSymB()) {
      MCSymbolData *B_SD = &Asm.getSymbolData(B->getSymbol());

      if (!B_SD->getFragment())
        report_fatal_error("symbol '" + B->getSymbol().getName() +
                          "' can not be undefined in a subtraction expression");

      // Select the appropriate difference relocation type.
      Type = macho::RIT_ARM_HalfDifference;
      Value2 = getSymbolAddress(B_SD, Layout);
      FixedValue -= getSectionAddress(B_SD->getFragment()->getParent());
    }

    // Relocations are written out in reverse order, so the PAIR comes first.
    // ARM_RELOC_HALF and ARM_RELOC_HALF_SECTDIFF abuse the r_length field:
    //
    // For these two r_type relocations they always have a pair following them
    // and the r_length bits are used differently.  The encoding of the
    // r_length is as follows:
    // low bit of r_length:
    //  0 - :lower16: for movw instructions
    //  1 - :upper16: for movt instructions
    // high bit of r_length:
    //  0 - arm instructions
    //  1 - thumb instructions
    // the other half of the relocated expression is in the following pair
    // relocation entry in the the low 16 bits of r_address field.
    unsigned ThumbBit = 0;
    unsigned MovtBit = 0;
    switch ((unsigned)Fixup.getKind()) {
    default: break;
    case ARM::fixup_arm_movt_hi16:
    case ARM::fixup_arm_movt_hi16_pcrel:
      MovtBit = 1;
      break;
    case ARM::fixup_t2_movt_hi16:
    case ARM::fixup_t2_movt_hi16_pcrel:
      MovtBit = 1;
      // Fallthrough
    case ARM::fixup_t2_movw_lo16:
    case ARM::fixup_t2_movw_lo16_pcrel:
      ThumbBit = 1;
      break;
    }


    if (Type == macho::RIT_ARM_HalfDifference) {
      uint32_t OtherHalf = MovtBit
        ? (FixedValue & 0xffff) : ((FixedValue & 0xffff0000) >> 16);

      macho::RelocationEntry MRE;
      MRE.Word0 = ((OtherHalf       <<  0) |
                   (macho::RIT_Pair << 24) |
                   (MovtBit         << 28) |
                   (ThumbBit        << 29) |
                   (IsPCRel         << 30) |
                   macho::RF_Scattered);
      MRE.Word1 = Value2;
      Relocations[Fragment->getParent()].push_back(MRE);
    }

    macho::RelocationEntry MRE;
    MRE.Word0 = ((FixupOffset <<  0) |
                 (Type        << 24) |
                 (MovtBit     << 28) |
                 (ThumbBit    << 29) |
                 (IsPCRel     << 30) |
                 macho::RF_Scattered);
    MRE.Word1 = Value;
    Relocations[Fragment->getParent()].push_back(MRE);
  }

  void RecordTLVPRelocation(const MCAssembler &Asm,
                            const MCAsmLayout &Layout,
                            const MCFragment *Fragment,
                            const MCFixup &Fixup, MCValue Target,
                            uint64_t &FixedValue) {
    assert(Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP &&
           !is64Bit() &&
           "Should only be called with a 32-bit TLVP relocation!");

    unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());
    uint32_t Value = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
    unsigned IsPCRel = 0;

    // Get the symbol data.
    MCSymbolData *SD_A = &Asm.getSymbolData(Target.getSymA()->getSymbol());
    unsigned Index = SD_A->getIndex();

    // We're only going to have a second symbol in pic mode and it'll be a
    // subtraction from the picbase. For 32-bit pic the addend is the difference
    // between the picbase and the next address.  For 32-bit static the addend
    // is zero.
    if (Target.getSymB()) {
      // If this is a subtraction then we're pcrel.
      uint32_t FixupAddress =
        getFragmentAddress(Fragment, Layout) + Fixup.getOffset();
      MCSymbolData *SD_B = &Asm.getSymbolData(Target.getSymB()->getSymbol());
      IsPCRel = 1;
      FixedValue = (FixupAddress - getSymbolAddress(SD_B, Layout) +
                    Target.getConstant());
      FixedValue += 1ULL << Log2Size;
    } else {
      FixedValue = 0;
    }

    // struct relocation_info (8 bytes)
    macho::RelocationEntry MRE;
    MRE.Word0 = Value;
    MRE.Word1 = ((Index                  <<  0) |
                 (IsPCRel                << 24) |
                 (Log2Size               << 25) |
                 (1                      << 27) | // Extern
                 (macho::RIT_Generic_TLV << 28)); // Type
    Relocations[Fragment->getParent()].push_back(MRE);
  }

  static bool getARMFixupKindMachOInfo(unsigned Kind, unsigned &RelocType,
                                       unsigned &Log2Size) {
    RelocType = unsigned(macho::RIT_Vanilla);
    Log2Size = ~0U;

    switch (Kind) {
    default:
      return false;

    case FK_Data_1:
      Log2Size = llvm::Log2_32(1);
      return true;
    case FK_Data_2:
      Log2Size = llvm::Log2_32(2);
      return true;
    case FK_Data_4:
      Log2Size = llvm::Log2_32(4);
      return true;
    case FK_Data_8:
      Log2Size = llvm::Log2_32(8);
      return true;

      // Handle 24-bit branch kinds.
    case ARM::fixup_arm_ldst_pcrel_12:
    case ARM::fixup_arm_pcrel_10:
    case ARM::fixup_arm_adr_pcrel_12:
    case ARM::fixup_arm_condbranch:
    case ARM::fixup_arm_uncondbranch:
      RelocType = unsigned(macho::RIT_ARM_Branch24Bit);
      // Report as 'long', even though that is not quite accurate.
      Log2Size = llvm::Log2_32(4);
      return true;

      // Handle Thumb branches.
    case ARM::fixup_arm_thumb_br:
    case ARM::fixup_arm_thumb_bl:
      RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit);
      Log2Size = llvm::Log2_32(2);
      return true;

    case ARM::fixup_arm_thumb_blx:
      RelocType = unsigned(macho::RIT_ARM_ThumbBranch22Bit);
      // Report as 'long', even though that is not quite accurate.
      Log2Size = llvm::Log2_32(4);
      return true;

    case ARM::fixup_arm_movt_hi16:
    case ARM::fixup_arm_movt_hi16_pcrel:
    case ARM::fixup_t2_movt_hi16:
    case ARM::fixup_t2_movt_hi16_pcrel:
      RelocType = unsigned(macho::RIT_ARM_HalfDifference);
      // Report as 'long', even though that is not quite accurate.
      Log2Size = llvm::Log2_32(4);
      return true;

    case ARM::fixup_arm_movw_lo16:
    case ARM::fixup_arm_movw_lo16_pcrel:
    case ARM::fixup_t2_movw_lo16:
    case ARM::fixup_t2_movw_lo16_pcrel:
      RelocType = unsigned(macho::RIT_ARM_Half);
      // Report as 'long', even though that is not quite accurate.
      Log2Size = llvm::Log2_32(4);
      return true;
    }
  }
  void RecordARMRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,
                           const MCFragment *Fragment, const MCFixup &Fixup,
                           MCValue Target, uint64_t &FixedValue) {
    unsigned IsPCRel = isFixupKindPCRel(Asm, Fixup.getKind());
    unsigned Log2Size;
    unsigned RelocType = macho::RIT_Vanilla;
    if (!getARMFixupKindMachOInfo(Fixup.getKind(), RelocType, Log2Size)) {
      report_fatal_error("unknown ARM fixup kind!");
      return;
    }

    // If this is a difference or a defined symbol plus an offset, then we need
    // a scattered relocation entry.  Differences always require scattered
    // relocations.
    if (Target.getSymB()) {
      if (RelocType == macho::RIT_ARM_Half ||
          RelocType == macho::RIT_ARM_HalfDifference)
        return RecordARMMovwMovtRelocation(Asm, Layout, Fragment, Fixup,
                                           Target, FixedValue);
      return RecordARMScatteredRelocation(Asm, Layout, Fragment, Fixup,
                                          Target, Log2Size, FixedValue);
    }

    // Get the symbol data, if any.
    MCSymbolData *SD = 0;
    if (Target.getSymA())
      SD = &Asm.getSymbolData(Target.getSymA()->getSymbol());

    // FIXME: For other platforms, we need to use scattered relocations for
    // internal relocations with offsets.  If this is an internal relocation
    // with an offset, it also needs a scattered relocation entry.
    //
    // Is this right for ARM?
    uint32_t Offset = Target.getConstant();
    if (IsPCRel && RelocType == macho::RIT_Vanilla)
      Offset += 1 << Log2Size;
    if (Offset && SD && !doesSymbolRequireExternRelocation(SD))
      return RecordARMScatteredRelocation(Asm, Layout, Fragment, Fixup, Target,
                                          Log2Size, FixedValue);

    // See <reloc.h>.
    uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
    unsigned Index = 0;
    unsigned IsExtern = 0;
    unsigned Type = 0;

    if (Target.isAbsolute()) { // constant
      // FIXME!
      report_fatal_error("FIXME: relocations to absolute targets "
                         "not yet implemented");
    } else if (SD->getSymbol().isVariable()) {
      int64_t Res;
      if (SD->getSymbol().getVariableValue()->EvaluateAsAbsolute(
            Res, Layout, SectionAddress)) {
        FixedValue = Res;
        return;
      }

      report_fatal_error("unsupported relocation of variable '" +
                         SD->getSymbol().getName() + "'");
    } else {
      // Check whether we need an external or internal relocation.
      if (doesSymbolRequireExternRelocation(SD)) {
        IsExtern = 1;
        Index = SD->getIndex();
        // For external relocations, make sure to offset the fixup value to
        // compensate for the addend of the symbol address, if it was
        // undefined. This occurs with weak definitions, for example.
        if (!SD->Symbol->isUndefined())
          FixedValue -= Layout.getSymbolOffset(SD);
      } else {
        // The index is the section ordinal (1-based).
        Index = SD->getFragment()->getParent()->getOrdinal() + 1;
        FixedValue += getSectionAddress(SD->getFragment()->getParent());
      }
      if (IsPCRel)
        FixedValue -= getSectionAddress(Fragment->getParent());

      // The type is determined by the fixup kind.
      Type = RelocType;
    }

    // struct relocation_info (8 bytes)
    macho::RelocationEntry MRE;
    MRE.Word0 = FixupOffset;
    MRE.Word1 = ((Index     <<  0) |
                 (IsPCRel   << 24) |
                 (Log2Size  << 25) |
                 (IsExtern  << 27) |
                 (Type      << 28));
    Relocations[Fragment->getParent()].push_back(MRE);
  }

  void RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout,
                        const MCFragment *Fragment, const MCFixup &Fixup,
                        MCValue Target, uint64_t &FixedValue) {
    // FIXME: These needs to be factored into the target Mach-O writer.
    if (isARM()) {
      RecordARMRelocation(Asm, Layout, Fragment, Fixup, Target, FixedValue);
      return;
    }
    if (is64Bit()) {
      RecordX86_64Relocation(Asm, Layout, Fragment, Fixup, Target, FixedValue);
      return;
    }

    unsigned IsPCRel = isFixupKindPCRel(Asm, Fixup.getKind());
    unsigned Log2Size = getFixupKindLog2Size(Fixup.getKind());

    // If this is a 32-bit TLVP reloc it's handled a bit differently.
    if (Target.getSymA() &&
        Target.getSymA()->getKind() == MCSymbolRefExpr::VK_TLVP) {
      RecordTLVPRelocation(Asm, Layout, Fragment, Fixup, Target, FixedValue);
      return;
    }

    // If this is a difference or a defined symbol plus an offset, then we need
    // a scattered relocation entry.
    // Differences always require scattered relocations.
    if (Target.getSymB())
        return RecordScatteredRelocation(Asm, Layout, Fragment, Fixup,
                                         Target, Log2Size, FixedValue);

    // Get the symbol data, if any.
    MCSymbolData *SD = 0;
    if (Target.getSymA())
      SD = &Asm.getSymbolData(Target.getSymA()->getSymbol());

    // If this is an internal relocation with an offset, it also needs a
    // scattered relocation entry.
    uint32_t Offset = Target.getConstant();
    if (IsPCRel)
      Offset += 1 << Log2Size;
    if (Offset && SD && !doesSymbolRequireExternRelocation(SD))
      return RecordScatteredRelocation(Asm, Layout, Fragment, Fixup,
                                       Target, Log2Size, FixedValue);

    // See <reloc.h>.
    uint32_t FixupOffset = Layout.getFragmentOffset(Fragment)+Fixup.getOffset();
    unsigned Index = 0;
    unsigned IsExtern = 0;
    unsigned Type = 0;

    if (Target.isAbsolute()) { // constant
      // SymbolNum of 0 indicates the absolute section.
      //
      // FIXME: Currently, these are never generated (see code below). I cannot
      // find a case where they are actually emitted.
      Type = macho::RIT_Vanilla;
    } else if (SD->getSymbol().isVariable()) {
      int64_t Res;
      if (SD->getSymbol().getVariableValue()->EvaluateAsAbsolute(
            Res, Layout, SectionAddress)) {
        FixedValue = Res;
        return;
      }

      report_fatal_error("unsupported relocation of variable '" +
                         SD->getSymbol().getName() + "'");
    } else {
      // Check whether we need an external or internal relocation.
      if (doesSymbolRequireExternRelocation(SD)) {
        IsExtern = 1;
        Index = SD->getIndex();
        // For external relocations, make sure to offset the fixup value to
        // compensate for the addend of the symbol address, if it was
        // undefined. This occurs with weak definitions, for example.
        if (!SD->Symbol->isUndefined())
          FixedValue -= Layout.getSymbolOffset(SD);
      } else {
        // The index is the section ordinal (1-based).
        Index = SD->getFragment()->getParent()->getOrdinal() + 1;
        FixedValue += getSectionAddress(SD->getFragment()->getParent());
      }
      if (IsPCRel)
        FixedValue -= getSectionAddress(Fragment->getParent());

      Type = macho::RIT_Vanilla;
    }

    // struct relocation_info (8 bytes)
    macho::RelocationEntry MRE;
    MRE.Word0 = FixupOffset;
    MRE.Word1 = ((Index     <<  0) |
                 (IsPCRel   << 24) |
                 (Log2Size  << 25) |
                 (IsExtern  << 27) |
                 (Type      << 28));
    Relocations[Fragment->getParent()].push_back(MRE);
  }

  void BindIndirectSymbols(MCAssembler &Asm) {
    // This is the point where 'as' creates actual symbols for indirect symbols
    // (in the following two passes). It would be easier for us to do this
    // sooner when we see the attribute, but that makes getting the order in the
    // symbol table much more complicated than it is worth.
    //
    // FIXME: Revisit this when the dust settles.

    // Bind non lazy symbol pointers first.
    unsigned IndirectIndex = 0;
    for (MCAssembler::indirect_symbol_iterator it = Asm.indirect_symbol_begin(),
           ie = Asm.indirect_symbol_end(); it != ie; ++it, ++IndirectIndex) {
      const MCSectionMachO &Section =
        cast<MCSectionMachO>(it->SectionData->getSection());

      if (Section.getType() != MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS)
        continue;

      // Initialize the section indirect symbol base, if necessary.
      if (!IndirectSymBase.count(it->SectionData))
        IndirectSymBase[it->SectionData] = IndirectIndex;

      Asm.getOrCreateSymbolData(*it->Symbol);
    }

    // Then lazy symbol pointers and symbol stubs.
    IndirectIndex = 0;
    for (MCAssembler::indirect_symbol_iterator it = Asm.indirect_symbol_begin(),
           ie = Asm.indirect_symbol_end(); it != ie; ++it, ++IndirectIndex) {
      const MCSectionMachO &Section =
        cast<MCSectionMachO>(it->SectionData->getSection());

      if (Section.getType() != MCSectionMachO::S_LAZY_SYMBOL_POINTERS &&
          Section.getType() != MCSectionMachO::S_SYMBOL_STUBS)
        continue;

      // Initialize the section indirect symbol base, if necessary.
      if (!IndirectSymBase.count(it->SectionData))
        IndirectSymBase[it->SectionData] = IndirectIndex;

      // Set the symbol type to undefined lazy, but only on construction.
      //
      // FIXME: Do not hardcode.
      bool Created;
      MCSymbolData &Entry = Asm.getOrCreateSymbolData(*it->Symbol, &Created);
      if (Created)
        Entry.setFlags(Entry.getFlags() | 0x0001);
    }
  }

  /// ComputeSymbolTable - Compute the symbol table data
  ///
  /// \param StringTable [out] - The string table data.
  /// \param StringIndexMap [out] - Map from symbol names to offsets in the
  /// string table.
  void ComputeSymbolTable(MCAssembler &Asm, SmallString<256> &StringTable,
                          std::vector<MachSymbolData> &LocalSymbolData,
                          std::vector<MachSymbolData> &ExternalSymbolData,
                          std::vector<MachSymbolData> &UndefinedSymbolData) {
    // Build section lookup table.
    DenseMap<const MCSection*, uint8_t> SectionIndexMap;
    unsigned Index = 1;
    for (MCAssembler::iterator it = Asm.begin(),
           ie = Asm.end(); it != ie; ++it, ++Index)
      SectionIndexMap[&it->getSection()] = Index;
    assert(Index <= 256 && "Too many sections!");

    // Index 0 is always the empty string.
    StringMap<uint64_t> StringIndexMap;
    StringTable += '\x00';

    // Build the symbol arrays and the string table, but only for non-local
    // symbols.
    //
    // The particular order that we collect the symbols and create the string
    // table, then sort the symbols is chosen to match 'as'. Even though it
    // doesn't matter for correctness, this is important for letting us diff .o
    // files.
    for (MCAssembler::symbol_iterator it = Asm.symbol_begin(),
           ie = Asm.symbol_end(); it != ie; ++it) {
      const MCSymbol &Symbol = it->getSymbol();

      // Ignore non-linker visible symbols.
      if (!Asm.isSymbolLinkerVisible(it->getSymbol()))
        continue;

      if (!it->isExternal() && !Symbol.isUndefined())
        continue;

      uint64_t &Entry = StringIndexMap[Symbol.getName()];
      if (!Entry) {
        Entry = StringTable.size();
        StringTable += Symbol.getName();
        StringTable += '\x00';
      }

      MachSymbolData MSD;
      MSD.SymbolData = it;
      MSD.StringIndex = Entry;

      if (Symbol.isUndefined()) {
        MSD.SectionIndex = 0;
        UndefinedSymbolData.push_back(MSD);
      } else if (Symbol.isAbsolute()) {
        MSD.SectionIndex = 0;
        ExternalSymbolData.push_back(MSD);
      } else {
        MSD.SectionIndex = SectionIndexMap.lookup(&Symbol.getSection());
        assert(MSD.SectionIndex && "Invalid section index!");
        ExternalSymbolData.push_back(MSD);
      }
    }

    // Now add the data for local symbols.
    for (MCAssembler::symbol_iterator it = Asm.symbol_begin(),
           ie = Asm.symbol_end(); it != ie; ++it) {
      const MCSymbol &Symbol = it->getSymbol();

      // Ignore non-linker visible symbols.
      if (!Asm.isSymbolLinkerVisible(it->getSymbol()))
        continue;

      if (it->isExternal() || Symbol.isUndefined())
        continue;

      uint64_t &Entry = StringIndexMap[Symbol.getName()];
      if (!Entry) {
        Entry = StringTable.size();
        StringTable += Symbol.getName();
        StringTable += '\x00';
      }

      MachSymbolData MSD;
      MSD.SymbolData = it;
      MSD.StringIndex = Entry;

      if (Symbol.isAbsolute()) {
        MSD.SectionIndex = 0;
        LocalSymbolData.push_back(MSD);
      } else {
        MSD.SectionIndex = SectionIndexMap.lookup(&Symbol.getSection());
        assert(MSD.SectionIndex && "Invalid section index!");
        LocalSymbolData.push_back(MSD);
      }
    }

    // External and undefined symbols are required to be in lexicographic order.
    std::sort(ExternalSymbolData.begin(), ExternalSymbolData.end());
    std::sort(UndefinedSymbolData.begin(), UndefinedSymbolData.end());

    // Set the symbol indices.
    Index = 0;
    for (unsigned i = 0, e = LocalSymbolData.size(); i != e; ++i)
      LocalSymbolData[i].SymbolData->setIndex(Index++);
    for (unsigned i = 0, e = ExternalSymbolData.size(); i != e; ++i)
      ExternalSymbolData[i].SymbolData->setIndex(Index++);
    for (unsigned i = 0, e = UndefinedSymbolData.size(); i != e; ++i)
      UndefinedSymbolData[i].SymbolData->setIndex(Index++);

    // The string table is padded to a multiple of 4.
    while (StringTable.size() % 4)
      StringTable += '\x00';
  }

  void computeSectionAddresses(const MCAssembler &Asm,
                               const MCAsmLayout &Layout) {
    uint64_t StartAddress = 0;
    const SmallVectorImpl<MCSectionData*> &Order = Layout.getSectionOrder();
    for (int i = 0, n = Order.size(); i != n ; ++i) {
      const MCSectionData *SD = Order[i];
      StartAddress = RoundUpToAlignment(StartAddress, SD->getAlignment());
      SectionAddress[SD] = StartAddress;
      StartAddress += Layout.getSectionAddressSize(SD);
      // Explicitly pad the section to match the alignment requirements of the
      // following one. This is for 'gas' compatibility, it shouldn't
      /// strictly be necessary.
      StartAddress += getPaddingSize(SD, Layout);
    }
  }

  void ExecutePostLayoutBinding(MCAssembler &Asm, const MCAsmLayout &Layout) {
    computeSectionAddresses(Asm, Layout);

    // Create symbol data for any indirect symbols.
    BindIndirectSymbols(Asm);

    // Compute symbol table information and bind symbol indices.
    ComputeSymbolTable(Asm, StringTable, LocalSymbolData, ExternalSymbolData,
                       UndefinedSymbolData);
  }

  virtual bool IsSymbolRefDifferenceFullyResolvedImpl(const MCAssembler &Asm,
                                                      const MCSymbolData &DataA,
                                                      const MCFragment &FB,
                                                      bool InSet,
                                                      bool IsPCRel) const {
    if (InSet)
      return true;

    // The effective address is
    //     addr(atom(A)) + offset(A)
    //   - addr(atom(B)) - offset(B)
    // and the offsets are not relocatable, so the fixup is fully resolved when
    //  addr(atom(A)) - addr(atom(B)) == 0.
    const MCSymbolData *A_Base = 0, *B_Base = 0;

    const MCSymbol &SA = DataA.getSymbol().AliasedSymbol();
    const MCSection &SecA = SA.getSection();
    const MCSection &SecB = FB.getParent()->getSection();

    if (IsPCRel) {
      // The simple (Darwin, except on x86_64) way of dealing with this was to
      // assume that any reference to a temporary symbol *must* be a temporary
      // symbol in the same atom, unless the sections differ. Therefore, any
      // PCrel relocation to a temporary symbol (in the same section) is fully
      // resolved. This also works in conjunction with absolutized .set, which
      // requires the compiler to use .set to absolutize the differences between
      // symbols which the compiler knows to be assembly time constants, so we
      // don't need to worry about considering symbol differences fully
      // resolved.

      if (!Asm.getBackend().hasReliableSymbolDifference()) {
        if (!SA.isTemporary() || !SA.isInSection() || &SecA != &SecB)
          return false;
        return true;
      }
    } else {
      if (!TargetObjectWriter->useAggressiveSymbolFolding())
        return false;
    }

    const MCFragment &FA = *Asm.getSymbolData(SA).getFragment();

    A_Base = FA.getAtom();
    if (!A_Base)
      return false;

    B_Base = FB.getAtom();
    if (!B_Base)
      return false;

    // If the atoms are the same, they are guaranteed to have the same address.
    if (A_Base == B_Base)
      return true;

    // Otherwise, we can't prove this is fully resolved.
    return false;
  }

  void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout) {
    unsigned NumSections = Asm.size();

    // The section data starts after the header, the segment load command (and
    // section headers) and the symbol table.
    unsigned NumLoadCommands = 1;
    uint64_t LoadCommandsSize = is64Bit() ?
      macho::SegmentLoadCommand64Size + NumSections * macho::Section64Size :
      macho::SegmentLoadCommand32Size + NumSections * macho::Section32Size;

    // Add the symbol table load command sizes, if used.
    unsigned NumSymbols = LocalSymbolData.size() + ExternalSymbolData.size() +
      UndefinedSymbolData.size();
    if (NumSymbols) {
      NumLoadCommands += 2;
      LoadCommandsSize += (macho::SymtabLoadCommandSize +
                           macho::DysymtabLoadCommandSize);
    }

    // Compute the total size of the section data, as well as its file size and
    // vm size.
    uint64_t SectionDataStart = (is64Bit() ? macho::Header64Size :
                                 macho::Header32Size) + LoadCommandsSize;
    uint64_t SectionDataSize = 0;
    uint64_t SectionDataFileSize = 0;
    uint64_t VMSize = 0;
    for (MCAssembler::const_iterator it = Asm.begin(),
           ie = Asm.end(); it != ie; ++it) {
      const MCSectionData &SD = *it;
      uint64_t Address = getSectionAddress(&SD);
      uint64_t Size = Layout.getSectionAddressSize(&SD);
      uint64_t FileSize = Layout.getSectionFileSize(&SD);
      FileSize += getPaddingSize(&SD, Layout);

      VMSize = std::max(VMSize, Address + Size);

      if (SD.getSection().isVirtualSection())
        continue;

      SectionDataSize = std::max(SectionDataSize, Address + Size);
      SectionDataFileSize = std::max(SectionDataFileSize, Address + FileSize);
    }

    // The section data is padded to 4 bytes.
    //
    // FIXME: Is this machine dependent?
    unsigned SectionDataPadding = OffsetToAlignment(SectionDataFileSize, 4);
    SectionDataFileSize += SectionDataPadding;

    // Write the prolog, starting with the header and load command...
    WriteHeader(NumLoadCommands, LoadCommandsSize,
                Asm.getSubsectionsViaSymbols());
    WriteSegmentLoadCommand(NumSections, VMSize,
                            SectionDataStart, SectionDataSize);

    // ... and then the section headers.
    uint64_t RelocTableEnd = SectionDataStart + SectionDataFileSize;
    for (MCAssembler::const_iterator it = Asm.begin(),
           ie = Asm.end(); it != ie; ++it) {
      std::vector<macho::RelocationEntry> &Relocs = Relocations[it];
      unsigned NumRelocs = Relocs.size();
      uint64_t SectionStart = SectionDataStart + getSectionAddress(it);
      WriteSection(Asm, Layout, *it, SectionStart, RelocTableEnd, NumRelocs);
      RelocTableEnd += NumRelocs * macho::RelocationInfoSize;
    }

    // Write the symbol table load command, if used.
    if (NumSymbols) {
      unsigned FirstLocalSymbol = 0;
      unsigned NumLocalSymbols = LocalSymbolData.size();
      unsigned FirstExternalSymbol = FirstLocalSymbol + NumLocalSymbols;
      unsigned NumExternalSymbols = ExternalSymbolData.size();
      unsigned FirstUndefinedSymbol = FirstExternalSymbol + NumExternalSymbols;
      unsigned NumUndefinedSymbols = UndefinedSymbolData.size();
      unsigned NumIndirectSymbols = Asm.indirect_symbol_size();
      unsigned NumSymTabSymbols =
        NumLocalSymbols + NumExternalSymbols + NumUndefinedSymbols;
      uint64_t IndirectSymbolSize = NumIndirectSymbols * 4;
      uint64_t IndirectSymbolOffset = 0;

      // If used, the indirect symbols are written after the section data.
      if (NumIndirectSymbols)
        IndirectSymbolOffset = RelocTableEnd;

      // The symbol table is written after the indirect symbol data.
      uint64_t SymbolTableOffset = RelocTableEnd + IndirectSymbolSize;

      // The string table is written after symbol table.
      uint64_t StringTableOffset =
        SymbolTableOffset + NumSymTabSymbols * (is64Bit() ? macho::Nlist64Size :
                                                macho::Nlist32Size);
      WriteSymtabLoadCommand(SymbolTableOffset, NumSymTabSymbols,
                             StringTableOffset, StringTable.size());

      WriteDysymtabLoadCommand(FirstLocalSymbol, NumLocalSymbols,
                               FirstExternalSymbol, NumExternalSymbols,
                               FirstUndefinedSymbol, NumUndefinedSymbols,
                               IndirectSymbolOffset, NumIndirectSymbols);
    }

    // Write the actual section data.
    for (MCAssembler::const_iterator it = Asm.begin(),
           ie = Asm.end(); it != ie; ++it) {
      Asm.WriteSectionData(it, Layout);

      uint64_t Pad = getPaddingSize(it, Layout);
      for (unsigned int i = 0; i < Pad; ++i)
        Write8(0);
    }

    // Write the extra padding.
    WriteZeros(SectionDataPadding);

    // Write the relocation entries.
    for (MCAssembler::const_iterator it = Asm.begin(),
           ie = Asm.end(); it != ie; ++it) {
      // Write the section relocation entries, in reverse order to match 'as'
      // (approximately, the exact algorithm is more complicated than this).
      std::vector<macho::RelocationEntry> &Relocs = Relocations[it];
      for (unsigned i = 0, e = Relocs.size(); i != e; ++i) {
        Write32(Relocs[e - i - 1].Word0);
        Write32(Relocs[e - i - 1].Word1);
      }
    }

    // Write the symbol table data, if used.
    if (NumSymbols) {
      // Write the indirect symbol entries.
      for (MCAssembler::const_indirect_symbol_iterator
             it = Asm.indirect_symbol_begin(),
             ie = Asm.indirect_symbol_end(); it != ie; ++it) {
        // Indirect symbols in the non lazy symbol pointer section have some
        // special handling.
        const MCSectionMachO &Section =
          static_cast<const MCSectionMachO&>(it->SectionData->getSection());
        if (Section.getType() == MCSectionMachO::S_NON_LAZY_SYMBOL_POINTERS) {
          // If this symbol is defined and internal, mark it as such.
          if (it->Symbol->isDefined() &&
              !Asm.getSymbolData(*it->Symbol).isExternal()) {
            uint32_t Flags = macho::ISF_Local;
            if (it->Symbol->isAbsolute())
              Flags |= macho::ISF_Absolute;
            Write32(Flags);
            continue;
          }
        }

        Write32(Asm.getSymbolData(*it->Symbol).getIndex());
      }

      // FIXME: Check that offsets match computed ones.

      // Write the symbol table entries.
      for (unsigned i = 0, e = LocalSymbolData.size(); i != e; ++i)
        WriteNlist(LocalSymbolData[i], Layout);
      for (unsigned i = 0, e = ExternalSymbolData.size(); i != e; ++i)
        WriteNlist(ExternalSymbolData[i], Layout);
      for (unsigned i = 0, e = UndefinedSymbolData.size(); i != e; ++i)
        WriteNlist(UndefinedSymbolData[i], Layout);

      // Write the string table.
      OS << StringTable.str();
    }
  }
};

}

MCObjectWriter *llvm::createMachObjectWriter(MCMachObjectTargetWriter *MOTW,
                                             raw_ostream &OS,
                                             bool IsLittleEndian) {
  return new MachObjectWriter(MOTW, OS, IsLittleEndian);
}