blob: c4b40e24f758d81c54511f061853f6645e95b478 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
|
//===- Mips.td - Describe the Mips Target Machine ---------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by Bruno Cardoso Lopes and is distributed under the
// University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
// This is the top level entry point for the Mips target.
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Target-independent interfaces
//===----------------------------------------------------------------------===//
include "../Target.td"
//===----------------------------------------------------------------------===//
// Descriptions
//===----------------------------------------------------------------------===//
include "MipsRegisterInfo.td"
include "MipsSchedule.td"
include "MipsInstrInfo.td"
include "MipsCallingConv.td"
def MipsInstrInfo : InstrInfo {
let TSFlagsFields = [];
let TSFlagsShifts = [];
}
//===----------------------------------------------------------------------===//
// CPU Directives //
//===----------------------------------------------------------------------===//
// Not currently supported, but work as SubtargetFeature placeholder.
def FeatureMipsIII : SubtargetFeature<"mips3", "IsMipsIII", "true",
"MipsIII ISA Support">;
//===----------------------------------------------------------------------===//
// Mips processors supported.
//===----------------------------------------------------------------------===//
def : Processor<"mips1", MipsGenericItineraries, []>;
def : Processor<"r2000", MipsGenericItineraries, []>;
def : Processor<"r3000", MipsGenericItineraries, []>;
def Mips : Target {
let InstructionSet = MipsInstrInfo;
}
|
