test/CodeGen/PowerPC/vec_vrsave.ll


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; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | grep vrlw &&
; RUN: llvm-as < %s | llc -march=ppc32 -mcpu=g5 | not grep spr

<4 x int> %test_rol() {
        ret <4 x int> < int -11534337, int -11534337, int -11534337, int -11534337 >
}