aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen/R600/mulhu.ll
blob: 82a0783b7cf5c547e176708c8f4b0a5a27db6b46 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
;RUN: llc < %s -march=r600 -mcpu=verde -verify-machineinstrs | FileCheck %s

;CHECK: v_mov_b32_e32 v{{[0-9]+}}, 0xaaaaaaab
;CHECK: v_mul_hi_u32 v0, {{[sv][0-9]+}}, {{v[0-9]+}}
;CHECK-NEXT: v_lshrrev_b32_e32 v0, 1, v0

define void @test(i32 %p) {
   %i = udiv i32 %p, 3
   %r = bitcast i32 %i to float
   call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r)
   ret void
}

declare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) readnone

declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)