aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen/SystemZ/htm-intrinsics.ll
blob: 6441ef94b40622559724fc9487ade75062a7962a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
; Test transactional-execution intrinsics.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s

declare i32 @llvm.s390.tbegin(i8 *, i32)
declare i32 @llvm.s390.tbegin.nofloat(i8 *, i32)
declare void @llvm.s390.tbeginc(i8 *, i32)
declare i32 @llvm.s390.tend()
declare void @llvm.s390.tabort(i64)
declare void @llvm.s390.ntstg(i64, i64 *)
declare i32 @llvm.s390.etnd()
declare void @llvm.s390.ppa.txassist(i32)

; TBEGIN.
define void @test_tbegin() {
; CHECK-LABEL: test_tbegin:
; CHECK-NOT: stmg
; CHECK: std %f8,
; CHECK: std %f9,
; CHECK: std %f10,
; CHECK: std %f11,
; CHECK: std %f12,
; CHECK: std %f13,
; CHECK: std %f14,
; CHECK: std %f15,
; CHECK: tbegin 0, 65292
; CHECK: ld %f8,
; CHECK: ld %f9,
; CHECK: ld %f10,
; CHECK: ld %f11,
; CHECK: ld %f12,
; CHECK: ld %f13,
; CHECK: ld %f14,
; CHECK: ld %f15,
; CHECK: br %r14
  call i32 @llvm.s390.tbegin(i8 *null, i32 65292)
  ret void
}

; TBEGIN (nofloat).
define void @test_tbegin_nofloat1() {
; CHECK-LABEL: test_tbegin_nofloat1:
; CHECK-NOT: stmg
; CHECK-NOT: std
; CHECK: tbegin 0, 65292
; CHECK: br %r14
  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
  ret void
}

; TBEGIN (nofloat) with integer CC return value.
define i32 @test_tbegin_nofloat2() {
; CHECK-LABEL: test_tbegin_nofloat2:
; CHECK-NOT: stmg
; CHECK-NOT: std
; CHECK: tbegin 0, 65292
; CHECK: ipm %r2
; CHECK: srl %r2, 28
; CHECK: br %r14
  %res = call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
  ret i32 %res
}

; TBEGIN (nofloat) with implicit CC check.
define void @test_tbegin_nofloat3(i32 *%ptr) {
; CHECK-LABEL: test_tbegin_nofloat3:
; CHECK-NOT: stmg
; CHECK-NOT: std
; CHECK: tbegin 0, 65292
; CHECK: jnh  {{\.L*}}
; CHECK: mvhi 0(%r2), 0
; CHECK: br %r14
  %res = call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
  %cmp = icmp eq i32 %res, 2
  br i1 %cmp, label %if.then, label %if.end

if.then:                                          ; preds = %entry
  store i32 0, i32* %ptr, align 4
  br label %if.end

if.end:                                           ; preds = %if.then, %entry
  ret void
}

; TBEGIN (nofloat) with dual CC use.
define i32 @test_tbegin_nofloat4(i32 %pad, i32 *%ptr) {
; CHECK-LABEL: test_tbegin_nofloat4:
; CHECK-NOT: stmg
; CHECK-NOT: std
; CHECK: tbegin 0, 65292
; CHECK: ipm %r2
; CHECK: srl %r2, 28
; CHECK: cijlh %r2, 2,  {{\.L*}}
; CHECK: mvhi 0(%r3), 0
; CHECK: br %r14
  %res = call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65292)
  %cmp = icmp eq i32 %res, 2
  br i1 %cmp, label %if.then, label %if.end

if.then:                                          ; preds = %entry
  store i32 0, i32* %ptr, align 4
  br label %if.end

if.end:                                           ; preds = %if.then, %entry
  ret i32 %res
}

; TBEGIN (nofloat) with register.
define void @test_tbegin_nofloat5(i8 *%ptr) {
; CHECK-LABEL: test_tbegin_nofloat5:
; CHECK-NOT: stmg
; CHECK-NOT: std
; CHECK: tbegin 0(%r2), 65292
; CHECK: br %r14
  call i32 @llvm.s390.tbegin.nofloat(i8 *%ptr, i32 65292)
  ret void
}

; TBEGIN (nofloat) with GRSM 0x0f00.
define void @test_tbegin_nofloat6() {
; CHECK-LABEL: test_tbegin_nofloat6:
; CHECK: stmg %r6, %r15,
; CHECK-NOT: std
; CHECK: tbegin 0, 3840
; CHECK: br %r14
  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 3840)
  ret void
}

; TBEGIN (nofloat) with GRSM 0xf100.
define void @test_tbegin_nofloat7() {
; CHECK-LABEL: test_tbegin_nofloat7:
; CHECK: stmg %r8, %r15,
; CHECK-NOT: std
; CHECK: tbegin 0, 61696
; CHECK: br %r14
  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 61696)
  ret void
}

; TBEGIN (nofloat) with GRSM 0xfe00 -- stack pointer added automatically.
define void @test_tbegin_nofloat8() {
; CHECK-LABEL: test_tbegin_nofloat8:
; CHECK-NOT: stmg
; CHECK-NOT: std
; CHECK: tbegin 0, 65280
; CHECK: br %r14
  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 65024)
  ret void
}

; TBEGIN (nofloat) with GRSM 0xfb00 -- no frame pointer needed.
define void @test_tbegin_nofloat9() {
; CHECK-LABEL: test_tbegin_nofloat9:
; CHECK: stmg %r10, %r15,
; CHECK-NOT: std
; CHECK: tbegin 0, 64256
; CHECK: br %r14
  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 64256)
  ret void
}

; TBEGIN (nofloat) with GRSM 0xfb00 -- frame pointer added automatically.
define void @test_tbegin_nofloat10(i64 %n) {
; CHECK-LABEL: test_tbegin_nofloat10:
; CHECK: stmg %r11, %r15,
; CHECK-NOT: std
; CHECK: tbegin 0, 65280
; CHECK: br %r14
  %buf = alloca i8, i64 %n
  call i32 @llvm.s390.tbegin.nofloat(i8 *null, i32 64256)
  ret void
}

; TBEGINC.
define void @test_tbeginc() {
; CHECK-LABEL: test_tbeginc:
; CHECK-NOT: stmg
; CHECK-NOT: std
; CHECK: tbeginc 0, 65288
; CHECK: br %r14
  call void @llvm.s390.tbeginc(i8 *null, i32 65288)
  ret void
}

; TEND with integer CC return value.
define i32 @test_tend1() {
; CHECK-LABEL: test_tend1:
; CHECK: tend
; CHECK: ipm %r2
; CHECK: srl %r2, 28
; CHECK: br %r14
  %res = call i32 @llvm.s390.tend()
  ret i32 %res
}

; TEND with implicit CC check.
define void @test_tend3(i32 *%ptr) {
; CHECK-LABEL: test_tend3:
; CHECK: tend
; CHECK: je  {{\.L*}}
; CHECK: mvhi 0(%r2), 0
; CHECK: br %r14
  %res = call i32 @llvm.s390.tend()
  %cmp = icmp eq i32 %res, 2
  br i1 %cmp, label %if.then, label %if.end

if.then:                                          ; preds = %entry
  store i32 0, i32* %ptr, align 4
  br label %if.end

if.end:                                           ; preds = %if.then, %entry
  ret void
}

; TEND with dual CC use.
define i32 @test_tend2(i32 %pad, i32 *%ptr) {
; CHECK-LABEL: test_tend2:
; CHECK: tend
; CHECK: ipm %r2
; CHECK: srl %r2, 28
; CHECK: cijlh %r2, 2,  {{\.L*}}
; CHECK: mvhi 0(%r3), 0
; CHECK: br %r14
  %res = call i32 @llvm.s390.tend()
  %cmp = icmp eq i32 %res, 2
  br i1 %cmp, label %if.then, label %if.end

if.then:                                          ; preds = %entry
  store i32 0, i32* %ptr, align 4
  br label %if.end

if.end:                                           ; preds = %if.then, %entry
  ret i32 %res
}

; TABORT with register only.
define void @test_tabort1(i64 %val) {
; CHECK-LABEL: test_tabort1:
; CHECK: tabort 0(%r2)
; CHECK: br %r14
  call void @llvm.s390.tabort(i64 %val)
  ret void
}

; TABORT with immediate only.
define void @test_tabort2(i64 %val) {
; CHECK-LABEL: test_tabort2:
; CHECK: tabort 1234
; CHECK: br %r14
  call void @llvm.s390.tabort(i64 1234)
  ret void
}

; TABORT with register + immediate.
define void @test_tabort3(i64 %val) {
; CHECK-LABEL: test_tabort3:
; CHECK: tabort 1234(%r2)
; CHECK: br %r14
  %sum = add i64 %val, 1234
  call void @llvm.s390.tabort(i64 %sum)
  ret void
}

; TABORT with out-of-range immediate.
define void @test_tabort4(i64 %val) {
; CHECK-LABEL: test_tabort4:
; CHECK: tabort 0({{%r[1-5]}})
; CHECK: br %r14
  call void @llvm.s390.tabort(i64 4096)
  ret void
}

; NTSTG with base pointer only.
define void @test_ntstg1(i64 *%ptr, i64 %val) {
; CHECK-LABEL: test_ntstg1:
; CHECK: ntstg %r3, 0(%r2)
; CHECK: br %r14
  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
  ret void
}

; NTSTG with base and index.
; Check that VSTL doesn't allow an index.
define void @test_ntstg2(i64 *%base, i64 %index, i64 %val) {
; CHECK-LABEL: test_ntstg2:
; CHECK: sllg [[REG:%r[1-5]]], %r3, 3
; CHECK: ntstg %r4, 0([[REG]],%r2)
; CHECK: br %r14
  %ptr = getelementptr i64, i64 *%base, i64 %index
  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
  ret void
}

; NTSTG with the highest in-range displacement.
define void @test_ntstg3(i64 *%base, i64 %val) {
; CHECK-LABEL: test_ntstg3:
; CHECK: ntstg %r3, 524280(%r2)
; CHECK: br %r14
  %ptr = getelementptr i64, i64 *%base, i64 65535
  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
  ret void
}

; NTSTG with an out-of-range positive displacement.
define void @test_ntstg4(i64 *%base, i64 %val) {
; CHECK-LABEL: test_ntstg4:
; CHECK: ntstg %r3, 0({{%r[1-5]}})
; CHECK: br %r14
  %ptr = getelementptr i64, i64 *%base, i64 65536
  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
  ret void
}

; NTSTG with the lowest in-range displacement.
define void @test_ntstg5(i64 *%base, i64 %val) {
; CHECK-LABEL: test_ntstg5:
; CHECK: ntstg %r3, -524288(%r2)
; CHECK: br %r14
  %ptr = getelementptr i64, i64 *%base, i64 -65536
  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
  ret void
}

; NTSTG with an out-of-range negative displacement.
define void @test_ntstg6(i64 *%base, i64 %val) {
; CHECK-LABEL: test_ntstg6:
; CHECK: ntstg %r3, 0({{%r[1-5]}})
; CHECK: br %r14
  %ptr = getelementptr i64, i64 *%base, i64 -65537
  call void @llvm.s390.ntstg(i64 %val, i64 *%ptr)
  ret void
}

; ETND.
define i32 @test_etnd() {
; CHECK-LABEL: test_etnd:
; CHECK: etnd %r2
; CHECK: br %r14
  %res = call i32 @llvm.s390.etnd()
  ret i32 %res
}

; PPA (Transaction-Abort Assist)
define void @test_ppa_txassist(i32 %val) {
; CHECK-LABEL: test_ppa_txassist:
; CHECK: ppa %r2, 0, 1
; CHECK: br %r14
  call void @llvm.s390.ppa.txassist(i32 %val)
  ret void
}