1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
|
; Test insertions of memory into the low byte of an i32.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; Check a plain insertion with (or (and ... -0xff) (zext (load ....))).
; The whole sequence can be performed by IC.
define i32 @f1(i32 %orig, i8 *%ptr) {
; CHECK-LABEL: f1:
; CHECK-NOT: ni
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i32
%ptr1 = and i32 %orig, -256
%or = or i32 %ptr1, %ptr2
ret i32 %or
}
; Like f1, but with the operands reversed.
define i32 @f2(i32 %orig, i8 *%ptr) {
; CHECK-LABEL: f2:
; CHECK-NOT: ni
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i32
%ptr1 = and i32 %orig, -256
%or = or i32 %ptr2, %ptr1
ret i32 %or
}
; Check a case where more bits than lower 8 are masked out of the
; register value. We can use IC but must keep the original mask.
define i32 @f3(i32 %orig, i8 *%ptr) {
; CHECK-LABEL: f3:
; CHECK: nill %r2, 65024
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i32
%ptr1 = and i32 %orig, -512
%or = or i32 %ptr1, %ptr2
ret i32 %or
}
; Like f3, but with the operands reversed.
define i32 @f4(i32 %orig, i8 *%ptr) {
; CHECK-LABEL: f4:
; CHECK: nill %r2, 65024
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i32
%ptr1 = and i32 %orig, -512
%or = or i32 %ptr2, %ptr1
ret i32 %or
}
; Check a case where the low 8 bits are cleared by a shift left.
define i32 @f5(i32 %orig, i8 *%ptr) {
; CHECK-LABEL: f5:
; CHECK: sll %r2, 8
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i32
%ptr1 = shl i32 %orig, 8
%or = or i32 %ptr1, %ptr2
ret i32 %or
}
; Like f5, but with the operands reversed.
define i32 @f6(i32 %orig, i8 *%ptr) {
; CHECK-LABEL: f6:
; CHECK: sll %r2, 8
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i32
%ptr1 = shl i32 %orig, 8
%or = or i32 %ptr2, %ptr1
ret i32 %or
}
; Check insertions into a constant.
define i32 @f7(i32 %orig, i8 *%ptr) {
; CHECK-LABEL: f7:
; CHECK: lhi %r2, 256
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i32
%or = or i32 %ptr2, 256
ret i32 %or
}
; Like f7, but with the operands reversed.
define i32 @f8(i32 %orig, i8 *%ptr) {
; CHECK-LABEL: f8:
; CHECK: lhi %r2, 256
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%val = load i8 *%ptr
%ptr2 = zext i8 %val to i32
%or = or i32 256, %ptr2
ret i32 %or
}
; Check the high end of the IC range.
define i32 @f9(i32 %orig, i8 *%src) {
; CHECK-LABEL: f9:
; CHECK: ic %r2, 4095(%r3)
; CHECK: br %r14
%ptr = getelementptr i8 *%src, i64 4095
%val = load i8 *%ptr
%src2 = zext i8 %val to i32
%src1 = and i32 %orig, -256
%or = or i32 %src2, %src1
ret i32 %or
}
; Check the next byte up, which should use ICY instead of IC.
define i32 @f10(i32 %orig, i8 *%src) {
; CHECK-LABEL: f10:
; CHECK: icy %r2, 4096(%r3)
; CHECK: br %r14
%ptr = getelementptr i8 *%src, i64 4096
%val = load i8 *%ptr
%src2 = zext i8 %val to i32
%src1 = and i32 %orig, -256
%or = or i32 %src2, %src1
ret i32 %or
}
; Check the high end of the ICY range.
define i32 @f11(i32 %orig, i8 *%src) {
; CHECK-LABEL: f11:
; CHECK: icy %r2, 524287(%r3)
; CHECK: br %r14
%ptr = getelementptr i8 *%src, i64 524287
%val = load i8 *%ptr
%src2 = zext i8 %val to i32
%src1 = and i32 %orig, -256
%or = or i32 %src2, %src1
ret i32 %or
}
; Check the next byte up, which needs separate address logic.
; Other sequences besides this one would be OK.
define i32 @f12(i32 %orig, i8 *%src) {
; CHECK-LABEL: f12:
; CHECK: agfi %r3, 524288
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i8 *%src, i64 524288
%val = load i8 *%ptr
%src2 = zext i8 %val to i32
%src1 = and i32 %orig, -256
%or = or i32 %src2, %src1
ret i32 %or
}
; Check the high end of the negative ICY range.
define i32 @f13(i32 %orig, i8 *%src) {
; CHECK-LABEL: f13:
; CHECK: icy %r2, -1(%r3)
; CHECK: br %r14
%ptr = getelementptr i8 *%src, i64 -1
%val = load i8 *%ptr
%src2 = zext i8 %val to i32
%src1 = and i32 %orig, -256
%or = or i32 %src2, %src1
ret i32 %or
}
; Check the low end of the ICY range.
define i32 @f14(i32 %orig, i8 *%src) {
; CHECK-LABEL: f14:
; CHECK: icy %r2, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i8 *%src, i64 -524288
%val = load i8 *%ptr
%src2 = zext i8 %val to i32
%src1 = and i32 %orig, -256
%or = or i32 %src2, %src1
ret i32 %or
}
; Check the next byte down, which needs separate address logic.
; Other sequences besides this one would be OK.
define i32 @f15(i32 %orig, i8 *%src) {
; CHECK-LABEL: f15:
; CHECK: agfi %r3, -524289
; CHECK: ic %r2, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i8 *%src, i64 -524289
%val = load i8 *%ptr
%src2 = zext i8 %val to i32
%src1 = and i32 %orig, -256
%or = or i32 %src2, %src1
ret i32 %or
}
; Check that IC allows an index.
define i32 @f16(i32 %orig, i8 *%src, i64 %index) {
; CHECK-LABEL: f16:
; CHECK: ic %r2, 4095({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
%ptr1 = getelementptr i8 *%src, i64 %index
%ptr2 = getelementptr i8 *%ptr1, i64 4095
%val = load i8 *%ptr2
%src2 = zext i8 %val to i32
%src1 = and i32 %orig, -256
%or = or i32 %src2, %src1
ret i32 %or
}
; Check that ICY allows an index.
define i32 @f17(i32 %orig, i8 *%src, i64 %index) {
; CHECK-LABEL: f17:
; CHECK: icy %r2, 4096({{%r4,%r3|%r3,%r4}})
; CHECK: br %r14
%ptr1 = getelementptr i8 *%src, i64 %index
%ptr2 = getelementptr i8 *%ptr1, i64 4096
%val = load i8 *%ptr2
%src2 = zext i8 %val to i32
%src1 = and i32 %orig, -256
%or = or i32 %src2, %src1
ret i32 %or
}
|
