1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
|
; Test 16-bit GPR stores.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; Test an i16 store, which should get converted into an i32 truncation.
define void @f1(i16 *%dst, i16 %val) {
; CHECK-LABEL: f1:
; CHECK: sth %r3, 0(%r2)
; CHECK: br %r14
store i16 %val, i16 *%dst
ret void
}
; Test an i32 truncating store.
define void @f2(i16 *%dst, i32 %val) {
; CHECK-LABEL: f2:
; CHECK: sth %r3, 0(%r2)
; CHECK: br %r14
%trunc = trunc i32 %val to i16
store i16 %trunc, i16 *%dst
ret void
}
; Test an i64 truncating store.
define void @f3(i16 *%dst, i64 %val) {
; CHECK-LABEL: f3:
; CHECK: sth %r3, 0(%r2)
; CHECK: br %r14
%trunc = trunc i64 %val to i16
store i16 %trunc, i16 *%dst
ret void
}
; Check the high end of the STH range.
define void @f4(i16 *%dst, i16 %val) {
; CHECK-LABEL: f4:
; CHECK: sth %r3, 4094(%r2)
; CHECK: br %r14
%ptr = getelementptr i16 *%dst, i64 2047
store i16 %val, i16 *%ptr
ret void
}
; Check the next halfword up, which should use STHY instead of STH.
define void @f5(i16 *%dst, i16 %val) {
; CHECK-LABEL: f5:
; CHECK: sthy %r3, 4096(%r2)
; CHECK: br %r14
%ptr = getelementptr i16 *%dst, i64 2048
store i16 %val, i16 *%ptr
ret void
}
; Check the high end of the aligned STHY range.
define void @f6(i16 *%dst, i16 %val) {
; CHECK-LABEL: f6:
; CHECK: sthy %r3, 524286(%r2)
; CHECK: br %r14
%ptr = getelementptr i16 *%dst, i64 262143
store i16 %val, i16 *%ptr
ret void
}
; Check the next halfword up, which needs separate address logic.
; Other sequences besides this one would be OK.
define void @f7(i16 *%dst, i16 %val) {
; CHECK-LABEL: f7:
; CHECK: agfi %r2, 524288
; CHECK: sth %r3, 0(%r2)
; CHECK: br %r14
%ptr = getelementptr i16 *%dst, i64 262144
store i16 %val, i16 *%ptr
ret void
}
; Check the high end of the negative aligned STHY range.
define void @f8(i16 *%dst, i16 %val) {
; CHECK-LABEL: f8:
; CHECK: sthy %r3, -2(%r2)
; CHECK: br %r14
%ptr = getelementptr i16 *%dst, i64 -1
store i16 %val, i16 *%ptr
ret void
}
; Check the low end of the STHY range.
define void @f9(i16 *%dst, i16 %val) {
; CHECK-LABEL: f9:
; CHECK: sthy %r3, -524288(%r2)
; CHECK: br %r14
%ptr = getelementptr i16 *%dst, i64 -262144
store i16 %val, i16 *%ptr
ret void
}
; Check the next halfword down, which needs separate address logic.
; Other sequences besides this one would be OK.
define void @f10(i16 *%dst, i16 %val) {
; CHECK-LABEL: f10:
; CHECK: agfi %r2, -524290
; CHECK: sth %r3, 0(%r2)
; CHECK: br %r14
%ptr = getelementptr i16 *%dst, i64 -262145
store i16 %val, i16 *%ptr
ret void
}
; Check that STH allows an index.
define void @f11(i64 %dst, i64 %index, i16 %val) {
; CHECK-LABEL: f11:
; CHECK: sth %r4, 4094({{%r3,%r2|%r2,%r3}})
; CHECK: br %r14
%add1 = add i64 %dst, %index
%add2 = add i64 %add1, 4094
%ptr = inttoptr i64 %add2 to i16 *
store i16 %val, i16 *%ptr
ret void
}
; Check that STHY allows an index.
define void @f12(i64 %dst, i64 %index, i16 %val) {
; CHECK-LABEL: f12:
; CHECK: sthy %r4, 4096({{%r3,%r2|%r2,%r3}})
; CHECK: br %r14
%add1 = add i64 %dst, %index
%add2 = add i64 %add1, 4096
%ptr = inttoptr i64 %add2 to i16 *
store i16 %val, i16 *%ptr
ret void
}
|
