1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
|
; Test 32-bit logical shifts right.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
; Check the low end of the SRLG range.
define i64 @f1(i64 %a) {
; CHECK-LABEL: f1:
; CHECK: srlg %r2, %r2, 1
; CHECK: br %r14
%shift = lshr i64 %a, 1
ret i64 %shift
}
; Check the high end of the defined SRLG range.
define i64 @f2(i64 %a) {
; CHECK-LABEL: f2:
; CHECK: srlg %r2, %r2, 63
; CHECK: br %r14
%shift = lshr i64 %a, 63
ret i64 %shift
}
; We don't generate shifts by out-of-range values.
define i64 @f3(i64 %a) {
; CHECK-LABEL: f3:
; CHECK-NOT: srlg
; CHECK: br %r14
%shift = lshr i64 %a, 64
ret i64 %shift
}
; Check variable shifts.
define i64 @f4(i64 %a, i64 %amt) {
; CHECK-LABEL: f4:
; CHECK: srlg %r2, %r2, 0(%r3)
; CHECK: br %r14
%shift = lshr i64 %a, %amt
ret i64 %shift
}
; Check shift amounts that have a constant term.
define i64 @f5(i64 %a, i64 %amt) {
; CHECK-LABEL: f5:
; CHECK: srlg %r2, %r2, 10(%r3)
; CHECK: br %r14
%add = add i64 %amt, 10
%shift = lshr i64 %a, %add
ret i64 %shift
}
; ...and again with a sign-extended 32-bit shift amount.
define i64 @f6(i64 %a, i32 %amt) {
; CHECK-LABEL: f6:
; CHECK: srlg %r2, %r2, 10(%r3)
; CHECK: br %r14
%add = add i32 %amt, 10
%addext = sext i32 %add to i64
%shift = lshr i64 %a, %addext
ret i64 %shift
}
; ...and now with a zero-extended 32-bit shift amount.
define i64 @f7(i64 %a, i32 %amt) {
; CHECK-LABEL: f7:
; CHECK: srlg %r2, %r2, 10(%r3)
; CHECK: br %r14
%add = add i32 %amt, 10
%addext = zext i32 %add to i64
%shift = lshr i64 %a, %addext
ret i64 %shift
}
; Check shift amounts that have the largest in-range constant term. We could
; mask the amount instead.
define i64 @f8(i64 %a, i64 %amt) {
; CHECK-LABEL: f8:
; CHECK: srlg %r2, %r2, 524287(%r3)
; CHECK: br %r14
%add = add i64 %amt, 524287
%shift = lshr i64 %a, %add
ret i64 %shift
}
; Check the next value up, which without masking must use a separate
; addition.
define i64 @f9(i64 %a, i64 %amt) {
; CHECK-LABEL: f9:
; CHECK: a{{g?}}fi %r3, 524288
; CHECK: srlg %r2, %r2, 0(%r3)
; CHECK: br %r14
%add = add i64 %amt, 524288
%shift = lshr i64 %a, %add
ret i64 %shift
}
; Check cases where 1 is subtracted from the shift amount.
define i64 @f10(i64 %a, i64 %amt) {
; CHECK-LABEL: f10:
; CHECK: srlg %r2, %r2, -1(%r3)
; CHECK: br %r14
%sub = sub i64 %amt, 1
%shift = lshr i64 %a, %sub
ret i64 %shift
}
; Check the lowest value that can be subtracted from the shift amount.
; Again, we could mask the shift amount instead.
define i64 @f11(i64 %a, i64 %amt) {
; CHECK-LABEL: f11:
; CHECK: srlg %r2, %r2, -524288(%r3)
; CHECK: br %r14
%sub = sub i64 %amt, 524288
%shift = lshr i64 %a, %sub
ret i64 %shift
}
; Check the next value down, which without masking must use a separate
; addition.
define i64 @f12(i64 %a, i64 %amt) {
; CHECK-LABEL: f12:
; CHECK: a{{g?}}fi %r3, -524289
; CHECK: srlg %r2, %r2, 0(%r3)
; CHECK: br %r14
%sub = sub i64 %amt, 524289
%shift = lshr i64 %a, %sub
ret i64 %shift
}
; Check that we don't try to generate "indexed" shifts.
define i64 @f13(i64 %a, i64 %b, i64 %c) {
; CHECK-LABEL: f13:
; CHECK: a{{g?}}r {{%r3, %r4|%r4, %r3}}
; CHECK: srlg %r2, %r2, 0({{%r[34]}})
; CHECK: br %r14
%add = add i64 %b, %c
%shift = lshr i64 %a, %add
ret i64 %shift
}
; Check that the shift amount uses an address register. It cannot be in %r0.
define i64 @f14(i64 %a, i64 *%ptr) {
; CHECK-LABEL: f14:
; CHECK: l %r1, 4(%r3)
; CHECK: srlg %r2, %r2, 0(%r1)
; CHECK: br %r14
%amt = load i64 *%ptr
%shift = lshr i64 %a, %amt
ret i64 %shift
}
|
