1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
|
; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 | FileCheck %s
; RUN: opt -instsimplify -disable-output < %s
;CHECK: SHUFF0
define <8 x i32*> @SHUFF0(<4 x i32*> %ptrv) nounwind {
entry:
%G = shufflevector <4 x i32*> %ptrv, <4 x i32*> %ptrv, <8 x i32> <i32 2, i32 7, i32 1, i32 2, i32 4, i32 5, i32 1, i32 1>
;CHECK: pshufd
ret <8 x i32*> %G
;CHECK: ret
}
;CHECK: SHUFF1
define <4 x i32*> @SHUFF1(<4 x i32*> %ptrv) nounwind {
entry:
%G = shufflevector <4 x i32*> %ptrv, <4 x i32*> %ptrv, <4 x i32> <i32 2, i32 7, i32 7, i32 2>
;CHECK: pshufd
ret <4 x i32*> %G
;CHECK: ret
}
;CHECK: SHUFF3
define <4 x i8*> @SHUFF3(<4 x i8*> %ptrv) nounwind {
entry:
%G = shufflevector <4 x i8*> %ptrv, <4 x i8*> undef, <4 x i32> <i32 2, i32 7, i32 1, i32 2>
;CHECK: pshufd
ret <4 x i8*> %G
;CHECK: ret
}
;CHECK: LOAD0
define <4 x i8*> @LOAD0(<4 x i8*>* %p) nounwind {
entry:
%G = load <4 x i8*>, <4 x i8*>* %p
;CHECK: movaps
ret <4 x i8*> %G
;CHECK: ret
}
;CHECK: LOAD1
define <4 x i8*> @LOAD1(<4 x i8*>* %p) nounwind {
entry:
%G = load <4 x i8*>, <4 x i8*>* %p
;CHECK: movdqa
;CHECK: pshufd
;CHECK: movdqa
%T = shufflevector <4 x i8*> %G, <4 x i8*> %G, <4 x i32> <i32 7, i32 1, i32 4, i32 3>
store <4 x i8*> %T, <4 x i8*>* %p
ret <4 x i8*> %G
;CHECK: ret
}
;CHECK: LOAD2
define <4 x i8*> @LOAD2(<4 x i8*>* %p) nounwind {
entry:
%I = alloca <4 x i8*>
;CHECK: sub
%G = load <4 x i8*>, <4 x i8*>* %p
;CHECK: movaps
store <4 x i8*> %G, <4 x i8*>* %I
;CHECK: movaps
%Z = load <4 x i8*>, <4 x i8*>* %I
ret <4 x i8*> %Z
;CHECK: add
;CHECK: ret
}
;CHECK: INT2PTR0
define <4 x i32> @INT2PTR0(<4 x i8*>* %p) nounwind {
entry:
%G = load <4 x i8*>, <4 x i8*>* %p
;CHECK: movl
;CHECK: movaps
%K = ptrtoint <4 x i8*> %G to <4 x i32>
;CHECK: ret
ret <4 x i32> %K
}
;CHECK: INT2PTR1
define <4 x i32*> @INT2PTR1(<4 x i8>* %p) nounwind {
entry:
%G = load <4 x i8>, <4 x i8>* %p
;CHECK: movl
;CHECK: pmovzxbd (%
%K = inttoptr <4 x i8> %G to <4 x i32*>
;CHECK: ret
ret <4 x i32*> %K
}
;CHECK: BITCAST0
define <4 x i32*> @BITCAST0(<4 x i8*>* %p) nounwind {
entry:
%G = load <4 x i8*>, <4 x i8*>* %p
;CHECK: movl
%T = bitcast <4 x i8*> %G to <4 x i32*>
;CHECK: movaps
;CHECK: ret
ret <4 x i32*> %T
}
;CHECK: BITCAST1
define <2 x i32*> @BITCAST1(<2 x i8*>* %p) nounwind {
entry:
%G = load <2 x i8*>, <2 x i8*>* %p
;CHECK: movl
;CHECK: pmovzxdq
%T = bitcast <2 x i8*> %G to <2 x i32*>
;CHECK: ret
ret <2 x i32*> %T
}
;CHECK: ICMP0
define <4 x i32> @ICMP0(<4 x i8*>* %p0, <4 x i8*>* %p1) nounwind {
entry:
%g0 = load <4 x i8*>, <4 x i8*>* %p0
%g1 = load <4 x i8*>, <4 x i8*>* %p1
%k = icmp sgt <4 x i8*> %g0, %g1
;CHECK: pcmpgtd
%j = select <4 x i1> %k, <4 x i32> <i32 0, i32 1, i32 2, i32 4>, <4 x i32> <i32 9, i32 8, i32 7, i32 6>
ret <4 x i32> %j
;CHECK: ret
}
;CHECK: ICMP1
define <4 x i32> @ICMP1(<4 x i8*>* %p0, <4 x i8*>* %p1) nounwind {
entry:
%g0 = load <4 x i8*>, <4 x i8*>* %p0
%g1 = load <4 x i8*>, <4 x i8*>* %p1
%k = icmp eq <4 x i8*> %g0, %g1
;CHECK: pcmpeqd
%j = select <4 x i1> %k, <4 x i32> <i32 0, i32 1, i32 2, i32 4>, <4 x i32> <i32 9, i32 8, i32 7, i32 6>
ret <4 x i32> %j
;CHECK: ret
}
|
