test/CodeGen/X86/zext-inreg-1.ll


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; RUN: llvm-as < %s | llc -march=x86 | not grep and

; These tests differ from the ones in zext-inreg-0.ll in that
; on x86-64 they do require and instructions.

; These should use movzbl instead of 'and 255'.
; This related to not having ZERO_EXTEND_REG node.

define i64 @h(i64 %d) nounwind  {
        %e = add i64 %d, 1
        %retval = and i64 %e, 281474976710655
        ret i64 %retval
}