diff options
| author | Kenneth Graunke <kenneth@whitecape.org> | 2016-10-14 17:59:36 -0700 |
|---|---|---|
| committer | Emil Velikov <emil.l.velikov@gmail.com> | 2016-12-14 19:03:11 +0000 |
| commit | 41c18889be9844213b989705781f56865b82117d (patch) | |
| tree | a7e2d9493ec898e4657a2eab9bafd2052ba4b4c0 /.travis.yml | |
| parent | adda8b9eb67a888c10da1e9beb9426dffce74744 (diff) | |
| download | external_mesa3d-41c18889be9844213b989705781f56865b82117d.zip external_mesa3d-41c18889be9844213b989705781f56865b82117d.tar.gz external_mesa3d-41c18889be9844213b989705781f56865b82117d.tar.bz2 | |
i965: Allocate at least some URB space even when max_vertices = 0.
Allocating zero URB space is a really bad idea. The hardware has to
give threads a handle to their URB space, and threads have to use that
to terminate the thread. Having it be an empty region just breaks a
lot of assumptions. Hence, why we asserted that it isn't possible.
Unfortunately, it /is/ possible prior to Gen8, if max_vertices = 0.
In theory a geometry shader could do SSBO/image access and maybe
still accomplish something. In reality, this is tripped up by
conformance tests.
Gen8+ already avoids this problem by placing the vertex count DWord
in the URB entry header. This fixes things on earlier generations.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
(cherry picked from commit a41f5dcb141a11ca5ca0c765c305027b0f0b609e)
Diffstat (limited to '.travis.yml')
0 files changed, 0 insertions, 0 deletions