diff options
| author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-06-17 20:08:42 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-06-20 18:29:55 +0200 |
| commit | 1167905c41d4594153d6649c0cade96a83831cbd (patch) | |
| tree | fcbda64dd20a5c06a7875328f4e9dae2057eeb21 | |
| parent | 650137a9c8fb5ae4a214440ca3ebc43461e2d394 (diff) | |
| download | external_mesa3d-1167905c41d4594153d6649c0cade96a83831cbd.zip external_mesa3d-1167905c41d4594153d6649c0cade96a83831cbd.tar.gz external_mesa3d-1167905c41d4594153d6649c0cade96a83831cbd.tar.bz2 | |
radeonsi: use trapezoid distribution for tess on Fiji and Polaris
This yields a small performance improvement in Unigine Heaven.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 22 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_shaders.c | 10 |
2 files changed, 24 insertions, 8 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 6be2f4b..1cef1dc 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -3839,16 +3839,28 @@ static void si_init_config(struct si_context *sctx) } if (sctx->b.chip_class >= VI) { + unsigned vgt_tess_distribution; + si_pm4_set_reg(pm4, R_028424_CB_DCC_CONTROL, S_028424_OVERWRITE_COMBINER_MRT_SHARING_DISABLE(1) | S_028424_OVERWRITE_COMBINER_WATERMARK(4)); si_pm4_set_reg(pm4, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 30); si_pm4_set_reg(pm4, R_028C5C_VGT_OUT_DEALLOC_CNTL, 32); - si_pm4_set_reg(pm4, R_028B50_VGT_TESS_DISTRIBUTION, - S_028B50_ACCUM_ISOLINE(32) | - S_028B50_ACCUM_TRI(11) | - S_028B50_ACCUM_QUAD(11) | - S_028B50_DONUT_SPLIT(16)); + + vgt_tess_distribution = + S_028B50_ACCUM_ISOLINE(32) | + S_028B50_ACCUM_TRI(11) | + S_028B50_ACCUM_QUAD(11) | + S_028B50_DONUT_SPLIT(16); + + /* Testing with Unigine Heaven extreme tesselation yielded best results + * with TRAP_SPLIT = 3. + */ + if (sctx->b.family == CHIP_FIJI || + sctx->b.family >= CHIP_POLARIS10) + vgt_tess_distribution |= S_028B50_TRAP_SPLIT(3); + + si_pm4_set_reg(pm4, R_028B50_VGT_TESS_DISTRIBUTION, vgt_tess_distribution); } if (sctx->b.family == CHIP_STONEY) diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c index a7af76d..daef49d 100644 --- a/src/gallium/drivers/radeonsi/si_state_shaders.c +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c @@ -300,9 +300,13 @@ static void si_set_tesseval_regs(struct si_screen *sscreen, else topology = V_028B6C_OUTPUT_TRIANGLE_CW; - if (sscreen->b.chip_class >= VI) - distribution_mode = V_028B6C_DISTRIBUTION_MODE_DONUTS; - else + if (sscreen->b.chip_class >= VI) { + if (sscreen->b.family == CHIP_FIJI || + sscreen->b.family >= CHIP_POLARIS10) + distribution_mode = V_028B6C_DISTRIBUTION_MODE_TRAPEZOIDS; + else + distribution_mode = V_028B6C_DISTRIBUTION_MODE_DONUTS; + } else distribution_mode = V_028B6C_DISTRIBUTION_MODE_NO_DIST; si_pm4_set_reg(pm4, R_028B6C_VGT_TF_PARAM, |