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author | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-10-20 14:29:38 -0700 |
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committer | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-10-21 11:00:03 -0700 |
commit | 3c5d24363a4c3e332d9b0820b4682d3a336d00f7 (patch) | |
tree | fa4bfedba2a127e596cdd9c4996af2d6425e712b | |
parent | c643518452ce9a0c107c5666e2caa7806a04e7d4 (diff) | |
download | external_mesa3d-3c5d24363a4c3e332d9b0820b4682d3a336d00f7.zip external_mesa3d-3c5d24363a4c3e332d9b0820b4682d3a336d00f7.tar.gz external_mesa3d-3c5d24363a4c3e332d9b0820b4682d3a336d00f7.tar.bz2 |
i965: (trivial) rename computes stencil to gen9
All the documentation I can find says that this bit (and functionality) only
exists on SKL+. Since the bit isn't yet used, there is no real impact here.
The original code was added by Ken here (a surprisingly long time ago):
commit f3c6d6f1e151f6a44a76038dccebe4434038dcb1
Author: Kenneth Graunke <kenneth@whitecape.org>
Date: Thu Nov 29 21:00:27 2012 -0800
i965: Update 3DSTATE_PS, 3DSTATE_WM, and add 3DSTATE_PS_EXTRA.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 7a5ee1b..e61ad54 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -2383,7 +2383,7 @@ enum brw_pixel_shader_coverage_mask_mode { # define GEN8_PSX_ATTRIBUTE_ENABLE (1 << 8) # define GEN8_PSX_SHADER_DISABLES_ALPHA_TO_COVERAGE (1 << 7) # define GEN8_PSX_SHADER_IS_PER_SAMPLE (1 << 6) -# define GEN8_PSX_SHADER_COMPUTES_STENCIL (1 << 5) +# define GEN9_PSX_SHADER_COMPUTES_STENCIL (1 << 5) # define GEN9_PSX_SHADER_PULLS_BARY (1 << 3) # define GEN8_PSX_SHADER_HAS_UAV (1 << 2) # define GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK (1 << 1) |