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author | Zou Nan hai <nanhai.zou@intel.com> | 2012-07-27 06:04:02 +0800 |
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committer | Kenneth Graunke <kenneth@whitecape.org> | 2012-07-27 10:32:17 -0700 |
commit | 588881430a3d328f2d99fbd5197d85dafc31209b (patch) | |
tree | 0d5a25b0cff053277fef353f70515d48f7d905e0 | |
parent | fdd8df20e4a730f80bf4c331012d832bffd7072e (diff) | |
download | external_mesa3d-588881430a3d328f2d99fbd5197d85dafc31209b.zip external_mesa3d-588881430a3d328f2d99fbd5197d85dafc31209b.tar.gz external_mesa3d-588881430a3d328f2d99fbd5197d85dafc31209b.tar.bz2 |
intel: increase wm thread number to 80 on gen6 GT2
It seems reset is not required for setting the max_wm_threads to 80
on gen6 GT2.
Increases performance in the Counter-Strike: Source video stress test
by 7.18% (n=5).
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index faca726..e23e224 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -256,11 +256,7 @@ brwCreateContext(int api, } } else if (intel->gen == 6) { if (intel->gt == 2) { - /* This could possibly be 80, but is supposed to require - * disabling of WIZ hashing (bit 6 of GT_MODE, 0x20d0) and a - * GPU reset to change. - */ - brw->max_wm_threads = 40; + brw->max_wm_threads = 80; brw->max_vs_threads = 60; brw->max_gs_threads = 60; brw->urb.size = 64; /* volume 5c.5 section 5.1 */ |