i965: Remove the context field from brw_compiler

Reviewed-by: Matt Turner <mattst88@gmail.com>

15 files changed, 42 insertions, 63 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c
index 07b10a2..3aa79b5 100644
--- a/src/mesa/drivers/dri/i965/brw_clip.c
+++ b/src/mesa/drivers/dri/i965/brw_clip.c
@@ -62,7 +62,7 @@ static void compile_clip_prog( struct brw_context *brw,
 
    /* Begin the compilation:
     */
-   brw_init_compile(brw, &c.func, mem_ctx);
+   brw_init_compile(brw->intelScreen->devinfo, &c.func, mem_ctx);
 
    c.func.single_program_flow = 1;
 
diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c
index 070adba..395cd2f 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_line.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_line.c
@@ -45,7 +45,7 @@
 
 static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
 {
-   struct brw_context *brw = c->func.brw;
+   const struct brw_device_info *devinfo = c->func.devinfo;
    GLuint i = 0,j;
 
    /* Register usage is static, precompute here:
@@ -89,7 +89,7 @@ static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
    c->reg.clipdistance_offset = retype(brw_vec1_grf(i, 1), BRW_REGISTER_TYPE_W);
    i++;
 
-   if (brw->gen == 5) {
+   if (devinfo->gen == 5) {
       c->reg.ff_sync = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD);
       i++;
    }
@@ -129,7 +129,6 @@ static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
 static void clip_and_emit_line( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
-   struct brw_context *brw = p->brw;
    struct brw_indirect vtx0     = brw_indirect(0, 0);
    struct brw_indirect vtx1      = brw_indirect(1, 0);
    struct brw_indirect newvtx0   = brw_indirect(2, 0);
@@ -155,7 +154,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
    brw_clip_init_clipmask(c);
 
    /* -ve rhw workaround */
-   if (brw->has_negative_rhw_bug) {
+   if (p->devinfo->has_negative_rhw_bug) {
       brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
               brw_imm_ud(1<<20));
       brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
@@ -213,7 +212,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
               * Both can be negative on GM965/G965 due to RHW workaround
               * if so, this object should be rejected.
               */
-             if (brw->has_negative_rhw_bug) {
+             if (p->devinfo->has_negative_rhw_bug) {
                  brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE, c->reg.dp0, brw_imm_f(0.0));
                  brw_IF(p, BRW_EXECUTE_1);
                  {
@@ -239,7 +238,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
 
              /* If both are positive, do nothing */
              /* Only on GM965/G965 */
-             if (brw->has_negative_rhw_bug) {
+             if (p->devinfo->has_negative_rhw_bug) {
                  brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.dp0, brw_imm_f(0.0));
                  brw_IF(p, BRW_EXECUTE_1);
              }
@@ -255,7 +254,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c )
                                            BRW_PREDICATE_NORMAL);
              }
 
-             if (brw->has_negative_rhw_bug) {
+             if (p->devinfo->has_negative_rhw_bug) {
                  brw_ENDIF(p);
              }
          }
diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c
index d4babc9..ad5e588 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_tri.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c
@@ -50,7 +50,7 @@ static void release_tmps( struct brw_clip_compile *c )
 void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
 			      GLuint nr_verts )
 {
-   struct brw_context *brw = c->func.brw;
+   const struct brw_device_info *devinfo = c->func.devinfo;
    GLuint i = 0,j;
 
    /* Register usage is static, precompute here:
@@ -123,7 +123,7 @@ void brw_clip_tri_alloc_regs( struct brw_clip_compile *c,
    c->reg.clipdistance_offset = retype(brw_vec1_grf(i, 1), BRW_REGISTER_TYPE_W);
    i++;
 
-   if (brw->gen == 5) {
+   if (devinfo->gen == 5) {
       c->reg.ff_sync = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD);
       i++;
    }
diff --git a/src/mesa/drivers/dri/i965/brw_clip_util.c b/src/mesa/drivers/dri/i965/brw_clip_util.c
index ffd01dd..af2029b 100644
--- a/src/mesa/drivers/dri/i965/brw_clip_util.c
+++ b/src/mesa/drivers/dri/i965/brw_clip_util.c
@@ -417,7 +417,6 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
 {
    struct brw_compile *p = &c->func;
    struct brw_reg incoming = get_element_ud(c->reg.R0, 2);
-   struct brw_context *brw = p->brw;
 
    /* Shift so that lowest outcode bit is rightmost:
     */
@@ -429,7 +428,7 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
       /* Rearrange userclip outcodes so that they come directly after
        * the fixed plane bits.
        */
-      if (brw->gen == 5 || brw->is_g4x)
+      if (p->devinfo->gen == 5 || p->devinfo->is_g4x)
          brw_AND(p, tmp, incoming, brw_imm_ud(0xff<<14));
       else
          brw_AND(p, tmp, incoming, brw_imm_ud(0x3f<<14));
@@ -444,9 +443,8 @@ void brw_clip_init_clipmask( struct brw_clip_compile *c )
 void brw_clip_ff_sync(struct brw_clip_compile *c)
 {
     struct brw_compile *p = &c->func;
-    struct brw_context *brw = p->brw;
 
-    if (brw->gen == 5) {
+    if (p->devinfo->gen == 5) {
         brw_AND(p, brw_null_reg(), c->reg.ff_sync, brw_imm_ud(0x1));
         brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_Z);
         brw_IF(p, BRW_EXECUTE_1);
@@ -467,11 +465,9 @@ void brw_clip_ff_sync(struct brw_clip_compile *c)
 
 void brw_clip_init_ff_sync(struct brw_clip_compile *c)
 {
-    struct brw_context *brw = c->func.brw;
-
-    if (brw->gen == 5) {
-	struct brw_compile *p = &c->func;
+    struct brw_compile *p = &c->func;
 
+    if (p->devinfo->gen == 5) {
         brw_MOV(p, c->reg.ff_sync, brw_imm_ud(0));
     }
 }
diff --git a/src/mesa/drivers/dri/i965/brw_eu.c b/src/mesa/drivers/dri/i965/brw_eu.c
index 7f66382..ad0c2fb 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.c
+++ b/src/mesa/drivers/dri/i965/brw_eu.c
@@ -128,7 +128,7 @@ void brw_set_default_predicate_inverse(struct brw_compile *p, bool predicate_inv
 
 void brw_set_default_flag_reg(struct brw_compile *p, int reg, int subreg)
 {
-   if (p->brw->gen >= 7)
+   if (p->devinfo->gen >= 7)
       brw_inst_set_flag_reg_nr(p->devinfo, p->current, reg);
 
    brw_inst_set_flag_subreg_nr(p->devinfo, p->current, subreg);
@@ -143,11 +143,9 @@ void
 brw_set_default_compression_control(struct brw_compile *p,
 			    enum brw_compression compression_control)
 {
-   struct brw_context *brw = p->brw;
-
    p->compressed = (compression_control == BRW_COMPRESSION_COMPRESSED);
 
-   if (brw->gen >= 6) {
+   if (p->devinfo->gen >= 6) {
       /* Since we don't use the SIMD32 support in gen6, we translate
        * the pre-gen6 compression control here.
        */
@@ -188,9 +186,7 @@ void brw_set_default_saturate( struct brw_compile *p, bool enable )
 
 void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value)
 {
-   struct brw_context *brw = p->brw;
-
-   if (brw->gen >= 6)
+   if (p->devinfo->gen >= 6)
       brw_inst_set_acc_wr_control(p->devinfo, p->current, value);
 }
 
@@ -213,12 +209,12 @@ void brw_pop_insn_state( struct brw_compile *p )
 /***********************************************************************
  */
 void
-brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
+brw_init_compile(const struct brw_device_info *devinfo,
+                 struct brw_compile *p, void *mem_ctx)
 {
    memset(p, 0, sizeof(*p));
 
-   p->brw = brw;
-   p->devinfo = brw->intelScreen->devinfo;
+   p->devinfo = devinfo;
    /*
     * Set the initial instruction store array size to 1024, if found that
     * isn't enough, then it will double the store size at brw_next_insn()
@@ -250,7 +246,7 @@ brw_init_compile(struct brw_context *brw, struct brw_compile *p, void *mem_ctx)
    p->loop_stack = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
    p->if_depth_in_loop = rzalloc_array(mem_ctx, int, p->loop_stack_array_size);
 
-   brw_init_compaction_tables(brw);
+   brw_init_compaction_tables(devinfo);
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 9b51691..86240e8 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -69,7 +69,6 @@ struct brw_compile {
 
    bool single_program_flow;
    bool compressed;
-   struct brw_context *brw;
    const struct brw_device_info *devinfo;
 
    /* Control flow stacks:
@@ -110,7 +109,7 @@ void brw_set_default_predicate_inverse(struct brw_compile *p, bool predicate_inv
 void brw_set_default_flag_reg(struct brw_compile *p, int reg, int subreg);
 void brw_set_default_acc_write_control(struct brw_compile *p, unsigned value);
 
-void brw_init_compile(struct brw_context *, struct brw_compile *p,
+void brw_init_compile(const struct brw_device_info *, struct brw_compile *p,
 		      void *mem_ctx);
 void brw_disassemble(const struct brw_device_info *devinfo, void *assembly,
                      int start, int end, FILE *out);
@@ -463,7 +462,7 @@ enum brw_conditional_mod brw_negate_cmod(uint32_t cmod);
 enum brw_conditional_mod brw_swap_cmod(uint32_t cmod);
 
 /* brw_eu_compact.c */
-void brw_init_compaction_tables(struct brw_context *brw);
+void brw_init_compaction_tables(const struct brw_device_info *devinfo);
 void brw_compact_instructions(struct brw_compile *p, int start_offset,
                               int num_annotations, struct annotation *annotation);
 void brw_uncompact_instruction(const struct brw_device_info *devinfo,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_compact.c b/src/mesa/drivers/dri/i965/brw_eu_compact.c
index 56e87ad..6085897 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_compact.c
@@ -1306,7 +1306,7 @@ update_gen4_jump_count(const struct brw_device_info *devinfo, brw_inst *insn,
 }
 
 void
-brw_init_compaction_tables(struct brw_context *brw)
+brw_init_compaction_tables(const struct brw_device_info *devinfo)
 {
    static bool initialized;
    if (initialized || p_atomic_cmpxchg(&initialized, false, true) != false)
@@ -1329,7 +1329,7 @@ brw_init_compaction_tables(struct brw_context *brw)
    assert(gen8_subreg_table[ARRAY_SIZE(gen8_subreg_table) - 1] != 0);
    assert(gen8_src_index_table[ARRAY_SIZE(gen8_src_index_table) - 1] != 0);
 
-   switch (brw->gen) {
+   switch (devinfo->gen) {
    case 9:
    case 8:
       control_index_table = gen8_control_index_table;
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index d11c220..2ffd205 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -48,8 +48,8 @@ gen6_resolve_implied_move(struct brw_compile *p,
 			  struct brw_reg *src,
 			  unsigned msg_reg_nr)
 {
-   struct brw_context *brw = p->brw;
-   if (brw->gen < 6)
+   const struct brw_device_info *devinfo = p->devinfo;
+   if (devinfo->gen < 6)
       return;
 
    if (src->file == BRW_MESSAGE_REGISTER_FILE)
@@ -78,8 +78,8 @@ gen7_convert_mrf_to_grf(struct brw_compile *p, struct brw_reg *reg)
     * Since we're pretending to have 16 MRFs anyway, we may as well use the
     * registers required for messages with EOT.
     */
-   struct brw_context *brw = p->brw;
-   if (brw->gen >= 7 && reg->file == BRW_MESSAGE_REGISTER_FILE) {
+   const struct brw_device_info *devinfo = p->devinfo;
+   if (devinfo->gen >= 7 && reg->file == BRW_MESSAGE_REGISTER_FILE) {
       reg->file = BRW_GENERAL_REGISTER_FILE;
       reg->nr += GEN7_MRF_HACK_START;
    }
diff --git a/src/mesa/drivers/dri/i965/brw_ff_gs.c b/src/mesa/drivers/dri/i965/brw_ff_gs.c
index a7d061a..996e560 100644
--- a/src/mesa/drivers/dri/i965/brw_ff_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_ff_gs.c
@@ -64,7 +64,7 @@ brw_compile_ff_gs_prog(struct brw_context *brw,
 
    /* Begin the compilation:
     */
-   brw_init_compile(brw, &c.func, mem_ctx);
+   brw_init_compile(brw->intelScreen->devinfo, &c.func, mem_ctx);
 
    c.func.single_program_flow = 1;
 
diff --git a/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c b/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c
index e7e8e02..314443c 100644
--- a/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_ff_gs_emit.c
@@ -244,14 +244,12 @@ static void brw_ff_gs_ff_sync(struct brw_ff_gs_compile *c, int num_prim)
 void
 brw_ff_gs_quads(struct brw_ff_gs_compile *c, struct brw_ff_gs_prog_key *key)
 {
-   struct brw_context *brw = c->func.brw;
-
    brw_ff_gs_alloc_regs(c, 4, false);
    brw_ff_gs_initialize_header(c);
    /* Use polygons for correct edgeflag behaviour. Note that vertex 3
     * is the PV for quads, but vertex 0 for polygons:
     */
-   if (brw->gen == 5)
+   if (c->func.devinfo->gen == 5)
       brw_ff_gs_ff_sync(c, 1);
    brw_ff_gs_overwrite_header_dw2(
       c, ((_3DPRIM_POLYGON << URB_WRITE_PRIM_TYPE_SHIFT)
@@ -284,12 +282,10 @@ void
 brw_ff_gs_quad_strip(struct brw_ff_gs_compile *c,
                      struct brw_ff_gs_prog_key *key)
 {
-   struct brw_context *brw = c->func.brw;
-
    brw_ff_gs_alloc_regs(c, 4, false);
    brw_ff_gs_initialize_header(c);
 
-   if (brw->gen == 5)
+   if (c->func.devinfo->gen == 5)
       brw_ff_gs_ff_sync(c, 1);
    brw_ff_gs_overwrite_header_dw2(
       c, ((_3DPRIM_POLYGON << URB_WRITE_PRIM_TYPE_SHIFT)
@@ -320,12 +316,10 @@ brw_ff_gs_quad_strip(struct brw_ff_gs_compile *c,
 
 void brw_ff_gs_lines(struct brw_ff_gs_compile *c)
 {
-   struct brw_context *brw = c->func.brw;
-
    brw_ff_gs_alloc_regs(c, 2, false);
    brw_ff_gs_initialize_header(c);
 
-   if (brw->gen == 5)
+   if (c->func.devinfo->gen == 5)
       brw_ff_gs_ff_sync(c, 1);
    brw_ff_gs_overwrite_header_dw2(
       c, ((_3DPRIM_LINESTRIP << URB_WRITE_PRIM_TYPE_SHIFT)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 6b4362b..3e103b2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -139,7 +139,7 @@ fs_generator::fs_generator(struct brw_context *brw,
    ctx = &brw->ctx;
 
    p = rzalloc(mem_ctx, struct brw_compile);
-   brw_init_compile(brw, p, mem_ctx);
+   brw_init_compile(brw->intelScreen->devinfo, p, mem_ctx);
 }
 
 fs_generator::~fs_generator()
diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c
index 47bc454..f056d8c 100644
--- a/src/mesa/drivers/dri/i965/brw_sf.c
+++ b/src/mesa/drivers/dri/i965/brw_sf.c
@@ -60,7 +60,7 @@ static void compile_sf_prog( struct brw_context *brw,
    mem_ctx = ralloc_context(NULL);
    /* Begin the compilation:
     */
-   brw_init_compile(brw, &c.func, mem_ctx);
+   brw_init_compile(brw->intelScreen->devinfo, &c.func, mem_ctx);
 
    c.key = *key;
    c.vue_map = brw->vue_map_geom_out;
diff --git a/src/mesa/drivers/dri/i965/brw_sf_emit.c b/src/mesa/drivers/dri/i965/brw_sf_emit.c
index a16303b..31ec69c 100644
--- a/src/mesa/drivers/dri/i965/brw_sf_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_sf_emit.c
@@ -192,7 +192,6 @@ static int count_flatshaded_attributes(struct brw_sf_compile *c)
 static void do_flatshade_triangle( struct brw_sf_compile *c )
 {
    struct brw_compile *p = &c->func;
-   struct brw_context *brw = p->brw;
    GLuint nr;
    GLuint jmpi = 1;
 
@@ -201,7 +200,7 @@ static void do_flatshade_triangle( struct brw_sf_compile *c )
    if (c->key.primitive == SF_UNFILLED_TRIS)
       return;
 
-   if (brw->gen == 5)
+   if (p->devinfo->gen == 5)
        jmpi = 2;
 
    nr = count_flatshaded_attributes(c);
@@ -225,7 +224,6 @@ static void do_flatshade_triangle( struct brw_sf_compile *c )
 static void do_flatshade_line( struct brw_sf_compile *c )
 {
    struct brw_compile *p = &c->func;
-   struct brw_context *brw = p->brw;
    GLuint nr;
    GLuint jmpi = 1;
 
@@ -234,7 +232,7 @@ static void do_flatshade_line( struct brw_sf_compile *c )
    if (c->key.primitive == SF_UNFILLED_TRIS)
       return;
 
-   if (brw->gen == 5)
+   if (p->devinfo->gen == 5)
        jmpi = 2;
 
    nr = count_flatshaded_attributes(c);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 427f917..94ab32d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -147,7 +147,7 @@ vec4_generator::vec4_generator(struct brw_context *brw,
      debug_flag(debug_flag)
 {
    p = rzalloc(mem_ctx, struct brw_compile);
-   brw_init_compile(brw, p, mem_ctx);
+   brw_init_compile(brw->intelScreen->devinfo, p, mem_ctx);
 }
 
 vec4_generator::~vec4_generator()
diff --git a/src/mesa/drivers/dri/i965/test_eu_compact.c b/src/mesa/drivers/dri/i965/test_eu_compact.c
index c80cc89..0343162 100644
--- a/src/mesa/drivers/dri/i965/test_eu_compact.c
+++ b/src/mesa/drivers/dri/i965/test_eu_compact.c
@@ -250,14 +250,14 @@ struct {
 };
 
 static bool
-run_tests(struct brw_context *brw)
+run_tests(const struct brw_device_info *devinfo)
 {
    bool fail = false;
 
    for (int i = 0; i < ARRAY_SIZE(tests); i++) {
       for (int align_16 = 0; align_16 <= 1; align_16++) {
 	 struct brw_compile *p = rzalloc(NULL, struct brw_compile);
-	 brw_init_compile(brw, p, p);
+	 brw_init_compile(devinfo, p, p);
 
 	 brw_set_default_predicate_control(p, BRW_PREDICATE_NONE);
 	 if (align_16)
@@ -288,15 +288,12 @@ run_tests(struct brw_context *brw)
 int
 main(int argc, char **argv)
 {
-   struct brw_context *brw = calloc(1, sizeof(*brw));
    struct brw_device_info *devinfo = calloc(1, sizeof(*devinfo));
-   brw->intelScreen = calloc(1, sizeof(*brw->intelScreen));
-   brw->intelScreen->devinfo = devinfo;
-   brw->gen = devinfo->gen = 6;
+   devinfo->gen = 6;
    bool fail = false;
 
-   for (brw->gen = 6; brw->gen <= 7; brw->gen++) {
-      fail |= run_tests(brw);
+   for (devinfo->gen = 6; devinfo->gen <= 7; devinfo->gen++) {
+      fail |= run_tests(devinfo);
    }
 
    return fail;