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| author | Nanley Chery <nanley.g.chery@intel.com> | 2016-05-03 10:06:29 -0700 |
|---|---|---|
| committer | Nanley Chery <nanley.g.chery@intel.com> | 2016-05-23 17:26:17 -0700 |
| commit | 9721be6681b4bedc8ca20a0a494a21ce02546577 (patch) | |
| tree | 1a473f890c579e1f96e4036c5879a8a306c1beec | |
| parent | 8b89c92ef602155907a73176ff3393d00a139fc6 (diff) | |
| download | external_mesa3d-9721be6681b4bedc8ca20a0a494a21ce02546577.zip external_mesa3d-9721be6681b4bedc8ca20a0a494a21ce02546577.tar.gz external_mesa3d-9721be6681b4bedc8ca20a0a494a21ce02546577.tar.bz2 | |
i965: Unset alpha blend for R10G10B10_SNORM_A2_UNORM
This format does not support alpha blending, according to the SNB PRM.
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_surface_formats.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 16667b9..8592c3b 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -125,7 +125,7 @@ const struct brw_surface_format_info surface_formats[] = { SF( Y, Y, x, x, Y, Y, Y, x, 60, x, R10G10B10A2_UNORM) SF( Y, Y, x, x, x, x, x, x, 60, x, R10G10B10A2_UNORM_SRGB) SF( Y, x, x, x, Y, x, Y, x, x, x, R10G10B10A2_UINT) - SF( Y, Y, x, x, x, Y, Y, x, x, x, R10G10B10_SNORM_A2_UNORM) + SF( Y, Y, x, x, x, x, Y, x, x, x, R10G10B10_SNORM_A2_UNORM) SF( Y, Y, x, x, Y, Y, Y, x, 60, 90, R8G8B8A8_UNORM) SF( Y, Y, x, x, Y, Y, x, x, 60, x, R8G8B8A8_UNORM_SRGB) SF( Y, Y, x, x, Y, 60, Y, x, x, 90, R8G8B8A8_SNORM) |