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| author | Kenneth Graunke <kenneth@whitecape.org> | 2015-07-24 21:15:35 -0700 |
|---|---|---|
| committer | Kenneth Graunke <kenneth@whitecape.org> | 2015-11-11 08:33:48 -0800 |
| commit | a2987ff57f08325f6e1dedae578bd6251a22b2b4 (patch) | |
| tree | c9c70325b21bd6e66d379714490481d2c9507d6b | |
| parent | cbb7d90e5784b1e44c1801f74c3088638940442d (diff) | |
| download | external_mesa3d-a2987ff57f08325f6e1dedae578bd6251a22b2b4.zip external_mesa3d-a2987ff57f08325f6e1dedae578bd6251a22b2b4.tar.gz external_mesa3d-a2987ff57f08325f6e1dedae578bd6251a22b2b4.tar.bz2 | |
i965: Map GL_PATCHES to 3DPRIM_PATCHLIST_n.
Inspired by a patch by Fabian Bieler.
Fabian defined a _3DPRIM_PATCHLIST_0 macro (which isn't actually a valid
topology type); I instead chose to make a macro that takes an argument.
He also took the number of patch vertices from _mesa_prim (which was set
to ctx->TessCtrlProgram.patch_vertices) - I chose to use it directly to
avoid the need for the VBO patch.
v2: Change macro to 0x20 + (n - 1) instead of 0x1F + n to better match
the documentation (suggested by Ian).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_draw.c | 9 |
2 files changed, 10 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 0396e13..99a3a2d 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -78,6 +78,8 @@ #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x16 +#define _3DPRIM_PATCHLIST(n) ({ assert(n > 0 && n <= 32); 0x20 + (n - 1); }) + /* We use this offset to be able to pass native primitive types in struct * _mesa_prim::mode. Native primitive types are BRW_PRIM_OFFSET + diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 39a26b0..bff484f 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -140,9 +140,16 @@ brw_set_prim(struct brw_context *brw, const struct _mesa_prim *prim) static void gen6_set_prim(struct brw_context *brw, const struct _mesa_prim *prim) { + const struct gl_context *ctx = &brw->ctx; + uint32_t hw_prim; + DBG("PRIM: %s\n", _mesa_enum_to_string(prim->mode)); - const uint32_t hw_prim = get_hw_prim_for_gl_prim(prim->mode); + if (prim->mode == GL_PATCHES) + hw_prim = _3DPRIM_PATCHLIST(ctx->TessCtrlProgram.patch_vertices); + else + hw_prim = get_hw_prim_for_gl_prim(prim->mode); + if (hw_prim != brw->primitive) { brw->primitive = hw_prim; brw->ctx.NewDriverState |= BRW_NEW_PRIMITIVE; |