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| author | Tom Stellard <thomas.stellard@amd.com> | 2012-07-24 14:49:25 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2012-07-27 17:08:09 +0000 |
| commit | dc0b8a46289d0e6b10c542df0856d51a0aabf9b0 (patch) | |
| tree | bbcd1b63eded1095155e4111be9afa8c52c059df | |
| parent | d3b013049126fb44d65a0a67001b04acbe778613 (diff) | |
| download | external_mesa3d-dc0b8a46289d0e6b10c542df0856d51a0aabf9b0.zip external_mesa3d-dc0b8a46289d0e6b10c542df0856d51a0aabf9b0.tar.gz external_mesa3d-dc0b8a46289d0e6b10c542df0856d51a0aabf9b0.tar.bz2 | |
r600g: Initialize VGT_PRIMITIVE_TYPE in the start_cs_cmd atom
The value of this register will always be DI_PT_POINTLIST for compute
shaders.
Reviewed-by: Marek Olšák <maraeo@gmail.com>
| -rw-r--r-- | src/gallium/drivers/r600/evergreen_compute.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c index 33e3243..5e43fae 100644 --- a/src/gallium/drivers/r600/evergreen_compute.c +++ b/src/gallium/drivers/r600/evergreen_compute.c @@ -268,8 +268,6 @@ void evergreen_direct_dispatch( /* Set CB_TARGET_MASK */ evergreen_reg_set(res, R_028238_CB_TARGET_MASK, rctx->compute_cb_target_mask); - evergreen_reg_set(res, R_008958_VGT_PRIMITIVE_TYPE, V_008958_DI_PT_POINTLIST); - evergreen_reg_set(res, R_00899C_VGT_COMPUTE_START_X, 0); evergreen_reg_set(res, R_0089A0_VGT_COMPUTE_START_Y, 0); evergreen_reg_set(res, R_0089A4_VGT_COMPUTE_START_Z, 0); @@ -633,6 +631,11 @@ void evergreen_init_atom_start_compute_cs(struct r600_context *ctx) } /* Config Registers */ + + /* The primitive type always needs to be POINTLIST for compute. */ + r600_store_config_reg(cb, R_008958_VGT_PRIMITIVE_TYPE, + V_008958_DI_PT_POINTLIST); + if (ctx->chip_class < CAYMAN) { /* These registers control which simds can be used by each stage. |