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author | Eric Anholt <eric@anholt.net> | 2009-06-22 15:39:37 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2009-06-23 19:31:12 -0700 |
commit | e0a4e25f938953201fef2bf702e2e709451200f4 (patch) | |
tree | e3128b9b7776cac1f1250051303f8f9f6145e09b | |
parent | 1593a1bb3435728806f66fff72a90e72a9616083 (diff) | |
download | external_mesa3d-e0a4e25f938953201fef2bf702e2e709451200f4.zip external_mesa3d-e0a4e25f938953201fef2bf702e2e709451200f4.tar.gz external_mesa3d-e0a4e25f938953201fef2bf702e2e709451200f4.tar.bz2 |
i965: Fix packed depth/stencil textures to be Y-tiled as well.
Fixes shadowtex.c. And an assert is added to catch this sooner next time.
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_misc_state.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 4784254..67c39e5 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -244,6 +244,8 @@ static void emit_depthbuffer(struct brw_context *brw) return; } + assert(region->tiling != I915_TILING_X); + BEGIN_BATCH(len, IGNORE_CLIPRECTS); OUT_BATCH(CMD_DEPTH_BUFFER << 16 | (len - 2)); OUT_BATCH(((region->pitch * region->cpp) - 1) | diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index 660d7e5..1ef2fe8 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -115,7 +115,8 @@ intel_miptree_create(struct intel_context *intel, if (intel->use_texture_tiling && compress_byte == 0 && intel->intelScreen->kernel_exec_fencing) { if (IS_965(intel->intelScreen->deviceID) && - internal_format == GL_DEPTH_COMPONENT) + (internal_format == GL_DEPTH_COMPONENT || + internal_format == GL_DEPTH_STENCIL_EXT)) tiling = I915_TILING_Y; else tiling = I915_TILING_X; |