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authorKenneth Graunke <kenneth@whitecape.org>2014-07-26 12:06:20 -0700
committerKenneth Graunke <kenneth@whitecape.org>2014-08-02 05:14:42 -0700
commiteee8196782d98e49876a34b51bf1e4c9b56acf2e (patch)
tree8d869e47610171e6c8185b599576b4c3bc0cde47
parent6afe21da6236f74acfb4daa6fbc4d6d1de700790 (diff)
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i965: Convert wrap mode #defines to an enum.
This makes it easy to tell that they're grouped together, and also improves gdb printing. Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 8b73c5c..c0dfe4f 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -610,13 +610,15 @@
#define HSW_SCS_BLUE 6
#define HSW_SCS_ALPHA 7
-#define BRW_TEXCOORDMODE_WRAP 0
-#define BRW_TEXCOORDMODE_MIRROR 1
-#define BRW_TEXCOORDMODE_CLAMP 2
-#define BRW_TEXCOORDMODE_CUBE 3
-#define BRW_TEXCOORDMODE_CLAMP_BORDER 4
-#define BRW_TEXCOORDMODE_MIRROR_ONCE 5
-#define GEN8_TEXCOORDMODE_HALF_BORDER 6
+enum brw_wrap_mode {
+ BRW_TEXCOORDMODE_WRAP = 0,
+ BRW_TEXCOORDMODE_MIRROR = 1,
+ BRW_TEXCOORDMODE_CLAMP = 2,
+ BRW_TEXCOORDMODE_CUBE = 3,
+ BRW_TEXCOORDMODE_CLAMP_BORDER = 4,
+ BRW_TEXCOORDMODE_MIRROR_ONCE = 5,
+ GEN8_TEXCOORDMODE_HALF_BORDER = 6,
+};
#define BRW_THREAD_PRIORITY_NORMAL 0
#define BRW_THREAD_PRIORITY_HIGH 1