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authorTopi Pohjolainen <topi.pohjolainen@intel.com>2015-12-09 12:56:06 +0200
committerTopi Pohjolainen <topi.pohjolainen@intel.com>2016-02-13 09:50:24 +0200
commitf709a0845792540544982740fa47be672825ee8a (patch)
tree5ab40738526212275f07d70998e62a56ad9e6e29
parent7513c5c782a5499df5558cb849ba7db9b31eb58c (diff)
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external_mesa3d-f709a0845792540544982740fa47be672825ee8a.tar.gz
external_mesa3d-f709a0845792540544982740fa47be672825ee8a.tar.bz2
i965: Add means for limiting color resolves
Until now there has been only one type of color buffer that needs to resolved - namely single sampled fast clear. As even the sampler engine in GPU doesn't understand the associated meta data, the color values need to be always resolved prior to reading them. From SKL onwards there is new scheme supported called the lossless compression of single sampled color buffers. This is something that is understood by the sampling engine and therefore resolving of these types of buffers is not necessary before sampling. This patch adds means to make the distinction when considering if resolve is needed. Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com> Reviewed-by: Ben Widawsky <benjamin.widawsky@intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp_blit.cpp2
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c8
-rw-r--r--src/mesa/drivers/dri/i965/intel_blit.c4
-rw-r--r--src/mesa/drivers/dri/i965/intel_copy_image.c4
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c9
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.h3
-rw-r--r--src/mesa/drivers/dri/i965/intel_pixel_bitmap.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_pixel_read.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_tex_image.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_tex_subimage.c2
10 files changed, 21 insertions, 17 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index c7cb394..e8c5e95 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -71,7 +71,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
* to destination color buffers, and the standard render path is
* fast-color-aware.
*/
- intel_miptree_resolve_color(brw, src_mt);
+ intel_miptree_resolve_color(brw, src_mt, 0);
intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_layer);
intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_layer);
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 44d2fe4..a5f7a2e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -208,7 +208,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
if (!tex_obj || !tex_obj->mt)
continue;
intel_miptree_all_slices_resolve_depth(brw, tex_obj->mt);
- intel_miptree_resolve_color(brw, tex_obj->mt);
+ intel_miptree_resolve_color(brw, tex_obj->mt, 0);
brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
}
@@ -223,7 +223,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
tex_obj = intel_texture_object(u->TexObj);
if (tex_obj && tex_obj->mt) {
- intel_miptree_resolve_color(brw, tex_obj->mt);
+ intel_miptree_resolve_color(brw, tex_obj->mt, 0);
brw_render_cache_set_check_flush(brw, tex_obj->mt->bo);
}
}
@@ -252,7 +252,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state)
_mesa_get_srgb_format_linear(mt->format) == mt->format)
continue;
- intel_miptree_resolve_color(brw, mt);
+ intel_miptree_resolve_color(brw, mt, 0);
brw_render_cache_set_check_flush(brw, mt->bo);
}
}
@@ -1227,7 +1227,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw,
if (rb == NULL || rb->mt == NULL)
continue;
if (rb->mt->num_samples <= 1)
- intel_miptree_resolve_color(brw, rb->mt);
+ intel_miptree_resolve_color(brw, rb->mt, 0);
else
intel_renderbuffer_downsample(brw, rb);
}
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 6d29fbd..72cf9af 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -317,8 +317,8 @@ intel_miptree_blit(struct brw_context *brw,
*/
intel_miptree_slice_resolve_depth(brw, src_mt, src_level, src_slice);
intel_miptree_slice_resolve_depth(brw, dst_mt, dst_level, dst_slice);
- intel_miptree_resolve_color(brw, src_mt);
- intel_miptree_resolve_color(brw, dst_mt);
+ intel_miptree_resolve_color(brw, src_mt, 0);
+ intel_miptree_resolve_color(brw, dst_mt, 0);
if (src_flip)
src_y = minify(src_mt->physical_height0, src_level - src_mt->first_level) - src_y - height;
diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c b/src/mesa/drivers/dri/i965/intel_copy_image.c
index dbbac1c..08b7623 100644
--- a/src/mesa/drivers/dri/i965/intel_copy_image.c
+++ b/src/mesa/drivers/dri/i965/intel_copy_image.c
@@ -270,11 +270,11 @@ intel_copy_image_sub_data(struct gl_context *ctx,
*/
intel_miptree_all_slices_resolve_hiz(brw, src_mt);
intel_miptree_all_slices_resolve_depth(brw, src_mt);
- intel_miptree_resolve_color(brw, src_mt);
+ intel_miptree_resolve_color(brw, src_mt, 0);
intel_miptree_all_slices_resolve_hiz(brw, dst_mt);
intel_miptree_all_slices_resolve_depth(brw, dst_mt);
- intel_miptree_resolve_color(brw, dst_mt);
+ intel_miptree_resolve_color(brw, dst_mt, 0);
_mesa_get_format_block_size(src_mt->format, &bw, &bh);
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 5f739d9..1f4c59b 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2012,8 +2012,11 @@ intel_miptree_all_slices_resolve_depth(struct brw_context *brw,
void
intel_miptree_resolve_color(struct brw_context *brw,
- struct intel_mipmap_tree *mt)
+ struct intel_mipmap_tree *mt,
+ int flags)
{
+ (void)flags;
+
switch (mt->fast_clear_state) {
case INTEL_FAST_CLEAR_STATE_NO_MCS:
case INTEL_FAST_CLEAR_STATE_RESOLVED:
@@ -2050,7 +2053,7 @@ intel_miptree_make_shareable(struct brw_context *brw,
assert(mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE);
if (mt->mcs_mt) {
- intel_miptree_resolve_color(brw, mt);
+ intel_miptree_resolve_color(brw, mt, 0);
intel_miptree_release(&mt->mcs_mt);
mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_NO_MCS;
}
@@ -2158,7 +2161,7 @@ intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt)
/* CPU accesses to color buffers don't understand fast color clears, so
* resolve any pending fast color clears before we map.
*/
- intel_miptree_resolve_color(brw, mt);
+ intel_miptree_resolve_color(brw, mt, 0);
drm_intel_bo *bo = mt->bo;
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 64f73ea..08cb1b8 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -886,7 +886,8 @@ intel_miptree_used_for_rendering(struct intel_mipmap_tree *mt)
void
intel_miptree_resolve_color(struct brw_context *brw,
- struct intel_mipmap_tree *mt);
+ struct intel_mipmap_tree *mt,
+ int flags);
void
intel_miptree_make_shareable(struct brw_context *brw,
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
index 699e48a..54a7413 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c
@@ -257,7 +257,7 @@ do_blit_bitmap( struct gl_context *ctx,
/* The blitter has no idea about fast color clears, so we need to resolve
* the miptree before we do anything.
*/
- intel_miptree_resolve_color(brw, irb->mt);
+ intel_miptree_resolve_color(brw, irb->mt, 0);
/* Chop it all into chunks that can be digested by hardware: */
for (py = 0; py < height; py += DY) {
diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c
index 10d1462..31030b1 100644
--- a/src/mesa/drivers/dri/i965/intel_pixel_read.c
+++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c
@@ -155,7 +155,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx,
/* Since we are going to read raw data to the miptree, we need to resolve
* any pending fast color clears before we start.
*/
- intel_miptree_resolve_color(brw, irb->mt);
+ intel_miptree_resolve_color(brw, irb->mt, 0);
bo = irb->mt->bo;
diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 5d32a4c..e21c3ac 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -423,7 +423,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx,
/* Since we are going to write raw data to the miptree, we need to resolve
* any pending fast color clears before we start.
*/
- intel_miptree_resolve_color(brw, image->mt);
+ intel_miptree_resolve_color(brw, image->mt, 0);
bo = image->mt->bo;
diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
index 970ded1..573f701 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c
@@ -140,7 +140,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx,
/* Since we are going to write raw data to the miptree, we need to resolve
* any pending fast color clears before we start.
*/
- intel_miptree_resolve_color(brw, image->mt);
+ intel_miptree_resolve_color(brw, image->mt, 0);
bo = image->mt->bo;