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| author | Dave Airlie <airlied@redhat.com> | 2016-11-08 16:22:39 +1000 |
|---|---|---|
| committer | Emil Velikov <emil.l.velikov@gmail.com> | 2016-11-09 14:16:03 +0000 |
| commit | 8ab9842d2e258147a2e84367fdd1d8a846df8d08 (patch) | |
| tree | a18b5df88491e0967f3150e6025a1f4341ea955f /src/amd/common/ac_nir_to_llvm.c | |
| parent | dba0abdc91b0f1a2c871a60272df577410eda78e (diff) | |
| download | external_mesa3d-8ab9842d2e258147a2e84367fdd1d8a846df8d08.zip external_mesa3d-8ab9842d2e258147a2e84367fdd1d8a846df8d08.tar.gz external_mesa3d-8ab9842d2e258147a2e84367fdd1d8a846df8d08.tar.bz2 | |
radv: emit correct last export when Z/stencil export is enabled
I was getting a random GPU hang in the renderpass simple tests,
it turns out sometimes radv emitted the wrong thing "last".
This fixes the logic to emit Z/stencil last if they occur,
and not mark a color output as last. Also this relies on the
Z/STENCIL being the first two fragment outputs, which they are
so yay.
Fixes: dEQP-VK.renderpass.simple.color_depth (random hangs)
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit bafc75b4370bfbec0c91ff6bb4d4972fb37bb22a)
Diffstat (limited to 'src/amd/common/ac_nir_to_llvm.c')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index b757e8c..45ce27a 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -4352,12 +4352,10 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx, for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) { LLVMValueRef values[4]; - bool last; + if (!(ctx->output_mask & (1ull << i))) continue; - last = ctx->output_mask <= ((1ull << (i + 1)) - 1); - if (i == FRAG_RESULT_DEPTH) { ctx->shader_info->fs.writes_z = true; depth = to_float(ctx, LLVMBuildLoad(ctx->builder, @@ -4367,10 +4365,14 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx, stencil = to_float(ctx, LLVMBuildLoad(ctx->builder, ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], "")); } else { + bool last = false; for (unsigned j = 0; j < 4; j++) values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder, ctx->outputs[radeon_llvm_reg_index_soa(i, j)], "")); + if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil) + last = ctx->output_mask <= ((1ull << (i + 1)) - 1); + si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last); index++; } |