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| author | Chih-Wei Huang <cwhuang@linux.org.tw> | 2016-11-15 16:02:40 +0800 |
|---|---|---|
| committer | Chih-Wei Huang <cwhuang@linux.org.tw> | 2016-11-16 10:46:46 +0800 |
| commit | f43ac65d6166f73eb439391b463218d97c65cce9 (patch) | |
| tree | 0d06ec98e48be80cd924d3f6647a3913f3686ce0 /src/amd/common | |
| parent | 1955a9ca8d71ba5eaff4073bdfff4dee76e1a73a (diff) | |
| parent | f2f487ebbb808010528edd69000694bfe525f87b (diff) | |
| download | external_mesa3d-f43ac65d6166f73eb439391b463218d97c65cce9.zip external_mesa3d-f43ac65d6166f73eb439391b463218d97c65cce9.tar.gz external_mesa3d-f43ac65d6166f73eb439391b463218d97c65cce9.tar.bz2 | |
Merge remote-tracking branch 'mesa/13.0' into nougat-x86
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_nir_to_llvm.c | 29 |
1 files changed, 26 insertions, 3 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index b757e8c..f235cc2 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -2609,6 +2609,24 @@ static void emit_barrier(struct nir_to_llvm_context *ctx) ctx->voidt, NULL, 0, 0); } +static void emit_discard_if(struct nir_to_llvm_context *ctx, + nir_intrinsic_instr *instr) +{ + LLVMValueRef cond; + ctx->shader_info->fs.can_discard = true; + + cond = LLVMBuildICmp(ctx->builder, LLVMIntNE, + get_src(ctx, instr->src[0]), + ctx->i32zero, ""); + + cond = LLVMBuildSelect(ctx->builder, cond, + LLVMConstReal(ctx->f32, -1.0f), + ctx->f32zero, ""); + emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kill", + LLVMVoidTypeInContext(ctx->context), + &cond, 1, 0); +} + static LLVMValueRef visit_load_local_invocation_index(struct nir_to_llvm_context *ctx) { @@ -2921,6 +2939,9 @@ static void visit_intrinsic(struct nir_to_llvm_context *ctx, LLVMVoidTypeInContext(ctx->context), NULL, 0, 0); break; + case nir_intrinsic_discard_if: + emit_discard_if(ctx, instr); + break; case nir_intrinsic_memory_barrier: emit_waitcnt(ctx); break; @@ -4352,12 +4373,10 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx, for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) { LLVMValueRef values[4]; - bool last; + if (!(ctx->output_mask & (1ull << i))) continue; - last = ctx->output_mask <= ((1ull << (i + 1)) - 1); - if (i == FRAG_RESULT_DEPTH) { ctx->shader_info->fs.writes_z = true; depth = to_float(ctx, LLVMBuildLoad(ctx->builder, @@ -4367,10 +4386,14 @@ handle_fs_outputs_post(struct nir_to_llvm_context *ctx, stencil = to_float(ctx, LLVMBuildLoad(ctx->builder, ctx->outputs[radeon_llvm_reg_index_soa(i, 0)], "")); } else { + bool last = false; for (unsigned j = 0; j < 4; j++) values[j] = to_float(ctx, LLVMBuildLoad(ctx->builder, ctx->outputs[radeon_llvm_reg_index_soa(i, j)], "")); + if (!ctx->shader_info->fs.writes_z && !ctx->shader_info->fs.writes_stencil) + last = ctx->output_mask <= ((1ull << (i + 1)) - 1); + si_export_mrt_color(ctx, values, V_008DFC_SQ_EXP_MRT + index, last); index++; } |