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| author | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-05-02 17:28:38 -0700 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-05-14 13:34:44 -0700 |
| commit | f47faa431616b36ad0d3811d0bcdd24f8b77cef9 (patch) | |
| tree | 9b7331356c6e1b5825582e7fcfa533052de93ed6 /src/compiler/nir/nir.h | |
| parent | 87a41e862b5344da6271d533552a890d59f07a4b (diff) | |
| download | external_mesa3d-f47faa431616b36ad0d3811d0bcdd24f8b77cef9.zip external_mesa3d-f47faa431616b36ad0d3811d0bcdd24f8b77cef9.tar.gz external_mesa3d-f47faa431616b36ad0d3811d0bcdd24f8b77cef9.tar.bz2 | |
nir: Add texture opcodes and source types for multisample compression
Intel hardware does a form of multisample compression that involves an
auxilary surface called the MCS. When an MCS is in use, you have to first
sample from the MCS with a special opcode and then pass the result of that
operation into the next sample instrucion. Normally, we just do this
ourselves in the back-end, but we want to expose that functionality to NIR
so that we can use MCS values directly in NIR-based blorp.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Diffstat (limited to 'src/compiler/nir/nir.h')
| -rw-r--r-- | src/compiler/nir/nir.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index d3934fb..dd91994 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -1068,6 +1068,7 @@ typedef enum { nir_tex_src_bias, nir_tex_src_lod, nir_tex_src_ms_index, /* MSAA sample index */ + nir_tex_src_ms_mcs, /* MSAA compression value */ nir_tex_src_ddx, nir_tex_src_ddy, nir_tex_src_texture_offset, /* < dynamically uniform indirect offset */ @@ -1087,6 +1088,7 @@ typedef enum { nir_texop_txd, /**< Texture look-up with partial derivatvies */ nir_texop_txf, /**< Texel fetch with explicit LOD */ nir_texop_txf_ms, /**< Multisample texture fetch */ + nir_texop_txf_ms_mcs, /**< Multisample compression value fetch */ nir_texop_txs, /**< Texture size */ nir_texop_lod, /**< Texture lod query */ nir_texop_tg4, /**< Texture gather */ @@ -1215,6 +1217,7 @@ nir_tex_instr_is_query(nir_tex_instr *instr) case nir_texop_lod: case nir_texop_texture_samples: case nir_texop_query_levels: + case nir_texop_txf_ms_mcs: return true; case nir_texop_tex: case nir_texop_txb: @@ -1235,6 +1238,9 @@ nir_tex_instr_src_size(nir_tex_instr *instr, unsigned src) if (instr->src[src].src_type == nir_tex_src_coord) return instr->coord_components; + /* The MCS value is expected to be a vec4 returned by a txf_ms_mcs */ + if (instr->src[src].src_type == nir_tex_src_ms_mcs) + return 4; if (instr->src[src].src_type == nir_tex_src_offset || instr->src[src].src_type == nir_tex_src_ddx || |