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author | Zack Rusin <zackr@vmware.com> | 2014-02-04 19:28:58 -0500 |
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committer | Zack Rusin <zackr@vmware.com> | 2014-02-05 19:40:53 -0500 |
commit | 69ee3f431f9f1bb782485ede992b95e01ad790a5 (patch) | |
tree | 97ae67573ae2f6c6532c176c31df9cdd33bf2459 /src/gallium/auxiliary/gallivm/lp_bld_limits.h | |
parent | 8507afc97fa3323c89ee4cd1359d2fa61015bcd0 (diff) | |
download | external_mesa3d-69ee3f431f9f1bb782485ede992b95e01ad790a5.zip external_mesa3d-69ee3f431f9f1bb782485ede992b95e01ad790a5.tar.gz external_mesa3d-69ee3f431f9f1bb782485ede992b95e01ad790a5.tar.bz2 |
gallivm: handle huge number of immediates
We only supported up to 256 immediates, which isn't enough. We had
code which was allocating immediates as an allocated array, but it
was always used along a statically backed array for performance
reasons. This commit adds code to skip that performance optimization
and always use just the dynamically allocated immediates if the
number of them is too great.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Diffstat (limited to 'src/gallium/auxiliary/gallivm/lp_bld_limits.h')
-rw-r--r-- | src/gallium/auxiliary/gallivm/lp_bld_limits.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_limits.h b/src/gallium/auxiliary/gallivm/lp_bld_limits.h index e03bac6..87be351 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_limits.h +++ b/src/gallium/auxiliary/gallivm/lp_bld_limits.h @@ -47,19 +47,21 @@ #define LP_MAX_TGSI_ADDRS 16 -#define LP_MAX_TGSI_IMMEDIATES 256 +#define LP_MAX_TGSI_IMMEDIATES 4096 #define LP_MAX_TGSI_PREDS 16 #define LP_MAX_TGSI_CONST_BUFFERS 16 /* - * For quick access we cache temps in a statically - * allocated array. This defines the maximum size - * of that array. + * For quick access we cache registers in statically + * allocated arrays. Here we define the maximum size + * for those arrays. */ #define LP_MAX_INLINED_TEMPS 256 +#define LP_MAX_INLINED_IMMEDIATES 256 + /** * Maximum control flow nesting * |