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author | Eric Anholt <eric@anholt.net> | 2016-07-26 16:19:15 -0700 |
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committer | Eric Anholt <eric@anholt.net> | 2016-08-19 13:11:36 -0700 |
commit | ed92241d7848a5f08360240795869d72b68054a3 (patch) | |
tree | fac95705bbdb7f01f439455764530bb50ed82085 /src/gallium/auxiliary/nir/tgsi_to_nir.c | |
parent | d80d03b830c2d884271bd5d44012c39c54fee121 (diff) | |
download | external_mesa3d-ed92241d7848a5f08360240795869d72b68054a3.zip external_mesa3d-ed92241d7848a5f08360240795869d72b68054a3.tar.gz external_mesa3d-ed92241d7848a5f08360240795869d72b68054a3.tar.bz2 |
ttn: Make FRAG_RESULT_DEPTH be a float variable to match gtn and ptn.
This lets TTN-using drivers handle FRAG_RESULT_DEPTH the same between all
their source paths.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'src/gallium/auxiliary/nir/tgsi_to_nir.c')
-rw-r--r-- | src/gallium/auxiliary/nir/tgsi_to_nir.c | 19 |
1 files changed, 16 insertions, 3 deletions
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c b/src/gallium/auxiliary/nir/tgsi_to_nir.c index 65eca6f..3d80ef0 100644 --- a/src/gallium/auxiliary/nir/tgsi_to_nir.c +++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c @@ -1918,9 +1918,22 @@ ttn_add_output_stores(struct ttn_compile *c) nir_intrinsic_instr *store = nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output); unsigned loc = var->data.driver_location + i; - store->num_components = 4; - store->src[0].reg.reg = c->output_regs[loc].reg; - store->src[0].reg.base_offset = c->output_regs[loc].offset; + + nir_src src = nir_src_for_reg(c->output_regs[loc].reg); + src.reg.base_offset = c->output_regs[loc].offset; + + if (c->build.shader->stage == MESA_SHADER_FRAGMENT && + var->data.location == FRAG_RESULT_DEPTH) { + /* TGSI uses TGSI_SEMANTIC_POSITION.z for the depth output, while + * NIR uses a single float FRAG_RESULT_DEPTH. + */ + src = nir_src_for_ssa(nir_channel(b, nir_ssa_for_src(b, src, 4), 2)); + store->num_components = 1; + } else { + store->num_components = 4; + } + store->src[0] = src; + nir_intrinsic_set_base(store, loc); nir_intrinsic_set_write_mask(store, 0xf); store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0)); |