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| author | Ilia Mirkin <imirkin@alum.mit.edu> | 2016-01-17 04:24:49 -0500 |
|---|---|---|
| committer | Ilia Mirkin <imirkin@alum.mit.edu> | 2016-01-29 21:04:36 -0500 |
| commit | 2ccc42fd2c63502ffb1273a5e4ff7c8d77dc6062 (patch) | |
| tree | 3095225ab54278272aaf2ec2ec38beebeb85c195 /src/gallium/docs | |
| parent | 30fcf241e13f82b3b9e3099632358b34cd35bff2 (diff) | |
| download | external_mesa3d-2ccc42fd2c63502ffb1273a5e4ff7c8d77dc6062.zip external_mesa3d-2ccc42fd2c63502ffb1273a5e4ff7c8d77dc6062.tar.gz external_mesa3d-2ccc42fd2c63502ffb1273a5e4ff7c8d77dc6062.tar.bz2 | |
tgsi: add MEMBAR opcode to handle memoryBarrier* GLSL intrinsics
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v1)
v1 -> v2: add defines for the various bits
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Diffstat (limited to 'src/gallium/docs')
| -rw-r--r-- | src/gallium/docs/source/tgsi.rst | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst index 7810a3e..489cbb0 100644 --- a/src/gallium/docs/source/tgsi.rst +++ b/src/gallium/docs/source/tgsi.rst @@ -2372,6 +2372,23 @@ programs. the program. Results are unspecified if any of the remaining threads terminates or never reaches an executed BARRIER instruction. +.. opcode:: MEMBAR - Memory barrier + + ``MEMBAR type`` + + This opcode waits for the completion of all memory accesses based on + the type passed in. The type is an immediate bitfield with the following + meaning: + + Bit 0: Shader storage buffers + Bit 1: Atomic buffers + Bit 2: Images + Bit 3: Shared memory + Bit 4: Thread group + + These may be passed in in any combination. An implementation is free to not + distinguish between these as it sees fit. However these map to all the + possibilities made available by GLSL. .. _atomopcodes: |