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authorKeith Whitwell <keithw@vmware.com>2009-10-31 18:23:14 +0000
committerKeith Whitwell <keithw@vmware.com>2009-10-31 18:23:14 +0000
commitf202a34cb1eca41cf5d12bd72016f284bc81ccf8 (patch)
tree73f3ba8cb1240706edf75808e362e611bfbe54d6 /src/gallium/drivers/i965/brw_wm.c
parent5d61b6f1f64ca26dd038af0679873ef0353660dd (diff)
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i965g: non-glsl fragment shader path is compiling
Disabled glsl code for now, probably want to clean this up somehow.
Diffstat (limited to 'src/gallium/drivers/i965/brw_wm.c')
-rw-r--r--src/gallium/drivers/i965/brw_wm.c14
1 files changed, 4 insertions, 10 deletions
diff --git a/src/gallium/drivers/i965/brw_wm.c b/src/gallium/drivers/i965/brw_wm.c
index 33602b5..4fbf9de 100644
--- a/src/gallium/drivers/i965/brw_wm.c
+++ b/src/gallium/drivers/i965/brw_wm.c
@@ -177,7 +177,10 @@ static int do_wm_prog( struct brw_context *brw,
*/
if (fp->has_flow_control) {
c->dispatch_width = 8;
- brw_wm_branching_shader_emit(brw, c);
+ /* XXX: GLSL support
+ */
+ exit(1);
+ //brw_wm_branching_shader_emit(brw, c);
}
else {
c->dispatch_width = 16;
@@ -239,18 +242,9 @@ static void brw_wm_populate_key( struct brw_context *brw,
brw->curr.fragment_shader->uses_depth,
key);
- /* Revisit this, figure out if it's really useful, and either push
- * it into the state tracker so that everyone benefits (use to
- * create fs varients with TEX rather than TXP), or discard.
- */
- key->proj_attrib_mask = ~0; /*brw->wm.input_size_masks[4-1];*/
-
/* PIPE_NEW_RAST */
key->flat_shade = brw->curr.rast->templ.flatshade;
- /* This can be determined by looking at the INTERP mode each input decl.
- */
- key->linear_attrib_mask = 0;
/* PIPE_NEW_BOUND_TEXTURES */
for (i = 0; i < brw->curr.num_textures; i++) {