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author | Ben Skeggs <bskeggs@redhat.com> | 2014-05-09 15:55:47 +1000 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2014-05-15 09:54:12 +1000 |
commit | 0079a375a58b288caacc2721f5a34b8f1233e7d1 (patch) | |
tree | 4d7b244b3cb826e9cbccf090fe549fea51351736 /src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | |
parent | 737477dac33d68b00b34019258d663945fbfeb56 (diff) | |
download | external_mesa3d-0079a375a58b288caacc2721f5a34b8f1233e7d1.zip external_mesa3d-0079a375a58b288caacc2721f5a34b8f1233e7d1.tar.gz external_mesa3d-0079a375a58b288caacc2721f5a34b8f1233e7d1.tar.bz2 |
nvc0: allow for easier modification of compiler library routines
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Diffstat (limited to 'src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp')
-rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp index 395d5b5..adf2df8 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp @@ -39,26 +39,26 @@ TargetNVC0::TargetNVC0(unsigned int card) : Target(false, card >= 0xe4) // lazyness -> will just hardcode everything for the time being -#include "target_lib_nvc0.asm.h" -#include "target_lib_nve4.asm.h" -#include "target_lib_nvf0.asm.h" +#include "lib/gf100.asm.h" +#include "lib/gk104.asm.h" +#include "lib/gk110.asm.h" void TargetNVC0::getBuiltinCode(const uint32_t **code, uint32_t *size) const { switch (chipset & ~0xf) { case 0xe0: - *code = (const uint32_t *)&nve4_builtin_code[0]; - *size = sizeof(nve4_builtin_code); + *code = (const uint32_t *)&gk104_builtin_code[0]; + *size = sizeof(gk104_builtin_code); break; case 0xf0: case 0x100: - *code = (const uint32_t *)&nvf0_builtin_code[0]; - *size = sizeof(nvf0_builtin_code); + *code = (const uint32_t *)&gk110_builtin_code[0]; + *size = sizeof(gk110_builtin_code); break; default: - *code = (const uint32_t *)&nvc0_builtin_code[0]; - *size = sizeof(nvc0_builtin_code); + *code = (const uint32_t *)&gf100_builtin_code[0]; + *size = sizeof(gf100_builtin_code); break; } } @@ -70,12 +70,12 @@ TargetNVC0::getBuiltinOffset(int builtin) const switch (chipset & ~0xf) { case 0xe0: - return nve4_builtin_offsets[builtin]; + return gk104_builtin_offsets[builtin]; case 0xf0: case 0x100: - return nvf0_builtin_offsets[builtin]; + return gk110_builtin_offsets[builtin]; default: - return nvc0_builtin_offsets[builtin]; + return gf100_builtin_offsets[builtin]; } } |