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author | Ilia Mirkin <imirkin@alum.mit.edu> | 2015-01-01 06:09:59 -0500 |
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committer | Ilia Mirkin <imirkin@alum.mit.edu> | 2015-09-05 23:03:52 -0400 |
commit | 75e34d1df8b0ab56e5e658b8ef90ff6057ec954e (patch) | |
tree | 606456f6a1e18248fc2f9d43afa92a2705bad315 /src/gallium/drivers/nouveau/nv50/nv50_shader_state.c | |
parent | 5165e464f225cd1b0f61e0da0758052b9b9ff518 (diff) | |
download | external_mesa3d-75e34d1df8b0ab56e5e658b8ef90ff6057ec954e.zip external_mesa3d-75e34d1df8b0ab56e5e658b8ef90ff6057ec954e.tar.gz external_mesa3d-75e34d1df8b0ab56e5e658b8ef90ff6057ec954e.tar.bz2 |
nv50: fix drawing from tfb, direct-to-pushbuf submits
The stride was being set to 0, which is illegal (and also non-sensical).
Also we must wait for the buffer to become available for reading as
otherwise a wrong value may be prefetched. Since we must wait for the
buffer anyways, and it's mapped and in GART, we may as well avoid the
annoyance of the indirect pushbuf submit.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Diffstat (limited to 'src/gallium/drivers/nouveau/nv50/nv50_shader_state.c')
-rw-r--r-- | src/gallium/drivers/nouveau/nv50/nv50_shader_state.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c b/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c index b033ce5..fdde11f 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_shader_state.c @@ -641,12 +641,12 @@ nv50_stream_output_validate(struct nv50_context *nv50) PUSH_DATA (push, so->num_attribs[i]); if (n == 4) { PUSH_DATA(push, targ->pipe.buffer_size); - - BEGIN_NV04(push, NVA0_3D(STRMOUT_OFFSET(i)), 1); if (!targ->clean) { assert(targ->pq); - nv50_query_pushbuf_submit(push, targ->pq, 0x4); + nv50_query_pushbuf_submit(push, NVA0_3D_STRMOUT_OFFSET(i), + targ->pq, 0x4); } else { + BEGIN_NV04(push, NVA0_3D(STRMOUT_OFFSET(i)), 1); PUSH_DATA(push, 0); targ->clean = false; } @@ -655,6 +655,7 @@ nv50_stream_output_validate(struct nv50_context *nv50) (so->stride[i] * nv50->state.prim_size); prims = MIN2(prims, limit); } + targ->stride = so->stride[i]; BCTX_REFN(nv50->bufctx_3d, SO, buf, WR); } if (prims != ~0) { |