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| author | Marek Olšák <marek.olsak@amd.com> | 2015-02-28 00:26:31 +0100 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2015-03-16 12:54:18 +0100 |
| commit | 216543ea547dd0572d9f2f0364f7a239a5aeafe1 (patch) | |
| tree | a7d6fb2160c1c736e0dcfb2d24790d6cb2ce315d /src/gallium/drivers/r600 | |
| parent | e92bc6b38e90339a394e95a562bcce35c3ee9696 (diff) | |
| download | external_mesa3d-216543ea547dd0572d9f2f0364f7a239a5aeafe1.zip external_mesa3d-216543ea547dd0572d9f2f0364f7a239a5aeafe1.tar.gz external_mesa3d-216543ea547dd0572d9f2f0364f7a239a5aeafe1.tar.bz2 | |
gallium: add FMA and DFMA opcodes (v3)
Needed by ARB_gpu_shader5.
v2: select DMAD for FMA with double precision
v3: add and select DFMA
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Diffstat (limited to 'src/gallium/drivers/r600')
| -rw-r--r-- | src/gallium/drivers/r600/r600_pipe.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_shader.c | 6 |
2 files changed, 4 insertions, 3 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c index 24d901e..21e5d42 100644 --- a/src/gallium/drivers/r600/r600_pipe.c +++ b/src/gallium/drivers/r600/r600_pipe.c @@ -493,6 +493,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e return 0; case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: + case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: return 0; } return 0; diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 2ee59c8..54540c3 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -7295,7 +7295,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = { {TGSI_OPCODE_MAD, 1, ALU_OP3_MULADD, tgsi_op3}, {TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2}, {TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp}, - {19, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_FMA, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_SQRT, 0, ALU_OP1_SQRT_IEEE, tgsi_trans_srcx_replicate}, {TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported}, {22, 0, ALU_OP0_NOP, tgsi_unsupported}, @@ -7494,7 +7494,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = { {TGSI_OPCODE_MAD, 1, ALU_OP3_MULADD, tgsi_op3}, {TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2}, {TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp}, - {19, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_FMA, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_SQRT, 0, ALU_OP1_SQRT_IEEE, tgsi_trans_srcx_replicate}, {TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported}, {22, 0, ALU_OP0_NOP, tgsi_unsupported}, @@ -7693,7 +7693,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = { {TGSI_OPCODE_MAD, 1, ALU_OP3_MULADD, tgsi_op3}, {TGSI_OPCODE_SUB, 0, ALU_OP2_ADD, tgsi_op2}, {TGSI_OPCODE_LRP, 0, ALU_OP0_NOP, tgsi_lrp}, - {19, 0, ALU_OP0_NOP, tgsi_unsupported}, + {TGSI_OPCODE_FMA, 0, ALU_OP0_NOP, tgsi_unsupported}, {TGSI_OPCODE_SQRT, 0, ALU_OP1_SQRT_IEEE, cayman_emit_float_instr}, {TGSI_OPCODE_DP2A, 0, ALU_OP0_NOP, tgsi_unsupported}, {22, 0, ALU_OP0_NOP, tgsi_unsupported}, |