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| author | Tom Stellard <thomas.stellard@amd.com> | 2012-08-29 10:33:58 -0400 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2012-08-29 15:52:10 -0400 |
| commit | 05113fd2662eeb0d17fd1074001b7405eeeca43c (patch) | |
| tree | 8f5701f3e526c1922a2f424e04b941063880425d /src/gallium/drivers/radeon/SIISelLowering.h | |
| parent | 733c28a0d95c1da87b14ef893f8a59b1f940322a (diff) | |
| download | external_mesa3d-05113fd2662eeb0d17fd1074001b7405eeeca43c.zip external_mesa3d-05113fd2662eeb0d17fd1074001b7405eeeca43c.tar.gz external_mesa3d-05113fd2662eeb0d17fd1074001b7405eeeca43c.tar.bz2 | |
radeon/llvm: Create a register class for the M0 register
The Common Subexpression Elimination pass will not operate on
instructions with physical register defs, so we end up with
several redundant copies to M0 when using interpolation.
Adding a register class that only contains the M0 register allows
use to use a virtual register to represent M0, and makes it possible
for the Common Subexpression Elimination pass to remove the extra
copies.
Diffstat (limited to 'src/gallium/drivers/radeon/SIISelLowering.h')
| -rw-r--r-- | src/gallium/drivers/radeon/SIISelLowering.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/SIISelLowering.h b/src/gallium/drivers/radeon/SIISelLowering.h index 9609311..77d61d8 100644 --- a/src/gallium/drivers/radeon/SIISelLowering.h +++ b/src/gallium/drivers/radeon/SIISelLowering.h @@ -32,7 +32,7 @@ class SITargetLowering : public AMDGPUTargetLowering void LowerSI_INTERP(MachineInstr *MI, MachineBasicBlock &BB, MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const; void LowerSI_INTERP_CONST(MachineInstr *MI, MachineBasicBlock &BB, - MachineBasicBlock::iterator I) const; + MachineBasicBlock::iterator I, MachineRegisterInfo &MRI) const; void LowerSI_KIL(MachineInstr *MI, MachineBasicBlock &BB, MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const; void LowerSI_V_CNDLT(MachineInstr *MI, MachineBasicBlock &BB, |