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| author | Michel Dänzer <michel.daenzer@amd.com> | 2012-08-29 18:55:08 +0200 |
|---|---|---|
| committer | Michel Dänzer <michel@daenzer.net> | 2012-09-06 16:46:42 +0200 |
| commit | 5edb80cee0e7d291db29963f01f2940fbd990398 (patch) | |
| tree | 27a78500b71ea04d5409f9669de68544d5eaabff /src/gallium/drivers/radeon/SIISelLowering.h | |
| parent | e7383b74ef529fbd474adc67a661dd4f03d97e80 (diff) | |
| download | external_mesa3d-5edb80cee0e7d291db29963f01f2940fbd990398.zip external_mesa3d-5edb80cee0e7d291db29963f01f2940fbd990398.tar.gz external_mesa3d-5edb80cee0e7d291db29963f01f2940fbd990398.tar.bz2 | |
radeon/llvm: Add intrinsic for enabling whole quad mode in SI pixel shaders.
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeon/SIISelLowering.h')
| -rw-r--r-- | src/gallium/drivers/radeon/SIISelLowering.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/SIISelLowering.h b/src/gallium/drivers/radeon/SIISelLowering.h index 80c7f4b..4407bf0 100644 --- a/src/gallium/drivers/radeon/SIISelLowering.h +++ b/src/gallium/drivers/radeon/SIISelLowering.h @@ -37,6 +37,8 @@ class SITargetLowering : public AMDGPUTargetLowering MachineBasicBlock::iterator I, MachineRegisterInfo &MRI) const; void LowerSI_KIL(MachineInstr *MI, MachineBasicBlock &BB, MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const; + void LowerSI_WQM(MachineInstr *MI, MachineBasicBlock &BB, + MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const; void LowerSI_V_CNDLT(MachineInstr *MI, MachineBasicBlock &BB, MachineBasicBlock::iterator I, MachineRegisterInfo & MRI) const; |