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authorTom Stellard <thomas.stellard@amd.com>2012-05-11 13:44:24 -0400
committerTom Stellard <thomas.stellard@amd.com>2012-05-11 15:09:52 -0400
commitbcfc97dbf40c256ed59c2424e0c55b845f0f2569 (patch)
tree75f46800f74716e7703c47a8f0b5b04a1551be6a /src/gallium/drivers/radeon/SIISelLowering.h
parent23c0d469e55b3cb79ad4b2fd0d961562a26234fd (diff)
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radeon/llvm: More comments and cleanups
Diffstat (limited to 'src/gallium/drivers/radeon/SIISelLowering.h')
-rw-r--r--src/gallium/drivers/radeon/SIISelLowering.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/SIISelLowering.h b/src/gallium/drivers/radeon/SIISelLowering.h
index 229e682..4a1bc38 100644
--- a/src/gallium/drivers/radeon/SIISelLowering.h
+++ b/src/gallium/drivers/radeon/SIISelLowering.h
@@ -23,6 +23,10 @@ class SITargetLowering : public AMDGPUTargetLowering
{
const SIInstrInfo * TII;
+ /// AppendS_WAITCNT - Memory reads and writes are syncronized using the
+ /// S_WAITCNT instruction. This function takes the most conservative
+ /// approach and inserts an S_WAITCNT instruction after every read and
+ /// write.
void AppendS_WAITCNT(MachineInstr *MI, MachineBasicBlock &BB,
MachineBasicBlock::iterator I) const;
void LowerSI_INTERP(MachineInstr *MI, MachineBasicBlock &BB,