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| author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-09-09 10:08:11 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-10-10 10:36:42 +0200 |
| commit | 77c81164bc1cd9ec98b32c40753f590791450434 (patch) | |
| tree | 10f8468ceb6de6cbf56cba29a457a7098085a1e9 /src/gallium/drivers/radeon/r600_pipe_common.h | |
| parent | 014bd4acb8b130fb31ec00f6125b8a91881bebdf (diff) | |
| download | external_mesa3d-77c81164bc1cd9ec98b32c40753f590791450434.zip external_mesa3d-77c81164bc1cd9ec98b32c40753f590791450434.tar.gz external_mesa3d-77c81164bc1cd9ec98b32c40753f590791450434.tar.bz2 | |
radeonsi: support ARB_compute_variable_group_size
Not sure if it's possible to avoid programming the block size twice (once for
the userdata and once for the dispatch).
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeon/r600_pipe_common.h')
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 54991e8..290b228 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -106,6 +106,8 @@ #define R600_MAP_BUFFER_ALIGNMENT 64 #define R600_MAX_VIEWPORTS 16 +#define SI_MAX_VARIABLE_THREADS_PER_BLOCK 1024 + enum r600_coherency { R600_COHERENCY_NONE, /* no cache flushes needed */ R600_COHERENCY_SHADER, |