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authorNicolai Hähnle <nicolai.haehnle@amd.com>2016-06-29 21:56:42 +0200
committerNicolai Hähnle <nicolai.haehnle@amd.com>2016-07-06 10:43:43 +0200
commitdd651261530e2d885d150755c9521e8f6e97c851 (patch)
tree10c9bdf1058c5229b08b57f26510b56d9c246f93 /src/gallium/drivers/radeon/r600_pipe_common.h
parent065eeb79f706d10340044447cc5821e64063ea9e (diff)
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gallium/radeon: add can_sample_z/s flags for textures
v2: adjust r600_init_color_surface as well Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeon/r600_pipe_common.h')
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 1ad69f8..1840640 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -242,6 +242,8 @@ struct r600_texture {
uint64_t size;
unsigned num_level0_transfers;
bool is_depth;
+ bool can_sample_z;
+ bool can_sample_s;
unsigned dirty_level_mask; /* each bit says if that mipmap is compressed */
unsigned stencil_dirty_level_mask; /* each bit says if that mipmap is compressed */
struct r600_texture *flushed_depth_texture;
@@ -872,6 +874,13 @@ r600_get_sampler_view_priority(struct r600_resource *res)
return RADEON_PRIO_SAMPLER_TEXTURE;
}
+static inline bool
+r600_can_sample_zs(struct r600_texture *tex, bool stencil_sampler)
+{
+ return (stencil_sampler && tex->can_sample_s) ||
+ (!stencil_sampler && tex->can_sample_z);
+}
+
#define COMPUTE_DBG(rscreen, fmt, args...) \
do { \
if ((rscreen->b.debug_flags & DBG_COMPUTE)) fprintf(stderr, fmt, ##args); \