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| author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-05-06 17:14:29 -0500 |
|---|---|---|
| committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-06-01 22:52:20 +0200 |
| commit | 89ba076de4c8cfa171365700e6a3b017d5e3eeff (patch) | |
| tree | 26319856e9ee655d47e938596798c42226e39cb0 /src/gallium/drivers/radeon/radeon_vce.h | |
| parent | a7c26bfc0ce9d12def9f05a84c19f51f3d311aaa (diff) | |
| download | external_mesa3d-89ba076de4c8cfa171365700e6a3b017d5e3eeff.zip external_mesa3d-89ba076de4c8cfa171365700e6a3b017d5e3eeff.tar.gz external_mesa3d-89ba076de4c8cfa171365700e6a3b017d5e3eeff.tar.bz2 | |
radeon/winsys: introduce radeon_winsys_cs_chunk
We will chain multiple chunks together and will keep pointers to the older
chunks to support IB dumping.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_vce.h')
| -rw-r--r-- | src/gallium/drivers/radeon/radeon_vce.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h index 8290e94..e438148 100644 --- a/src/gallium/drivers/radeon/radeon_vce.h +++ b/src/gallium/drivers/radeon/radeon_vce.h @@ -36,12 +36,14 @@ #include "util/list.h" -#define RVCE_CS(value) (enc->cs->buf[enc->cs->cdw++] = (value)) -#define RVCE_BEGIN(cmd) { uint32_t *begin = &enc->cs->buf[enc->cs->cdw++]; RVCE_CS(cmd) +#define RVCE_CS(value) (enc->cs->current.buf[enc->cs->current.cdw++] = (value)) +#define RVCE_BEGIN(cmd) { \ + uint32_t *begin = &enc->cs->current.buf[enc->cs->current.cdw++]; \ + RVCE_CS(cmd) #define RVCE_READ(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READ, (domain), (off)) #define RVCE_WRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_WRITE, (domain), (off)) #define RVCE_READWRITE(buf, domain, off) rvce_add_buffer(enc, (buf), RADEON_USAGE_READWRITE, (domain), (off)) -#define RVCE_END() *begin = (&enc->cs->buf[enc->cs->cdw] - begin) * 4; } +#define RVCE_END() *begin = (&enc->cs->current.buf[enc->cs->current.cdw] - begin) * 4; } #define RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE (4096 * 16 * 2.5) #define RVCE_MAX_AUX_BUFFER_NUM 4 |