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| author | Leo Liu <leo.liu@amd.com> | 2015-06-15 15:20:20 -0400 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2015-08-14 15:02:30 +0200 |
| commit | e91a67abfa5112acd481ee4a3f07c03f6ff2708c (patch) | |
| tree | e7e439281ccdbd88339cb0fbe7b3f1c056846095 /src/gallium/drivers/radeon/radeon_vce_50.c | |
| parent | fa80c1fe20f1fc33864f04fd9cf49f8bddfa4448 (diff) | |
| download | external_mesa3d-e91a67abfa5112acd481ee4a3f07c03f6ff2708c.zip external_mesa3d-e91a67abfa5112acd481ee4a3f07c03f6ff2708c.tar.gz external_mesa3d-e91a67abfa5112acd481ee4a3f07c03f6ff2708c.tar.bz2 | |
radeon/vce: fix VCE fail after rebase
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeon/radeon_vce_50.c')
| -rw-r--r-- | src/gallium/drivers/radeon/radeon_vce_50.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/src/gallium/drivers/radeon/radeon_vce_50.c b/src/gallium/drivers/radeon/radeon_vce_50.c index 80a69b5..a11cc6a 100644 --- a/src/gallium/drivers/radeon/radeon_vce_50.c +++ b/src/gallium/drivers/radeon/radeon_vce_50.c @@ -96,13 +96,11 @@ static void encode(struct rvce_encoder *enc) task_info(enc, 0x00000003); RVCE_BEGIN(0x05000001); // context buffer - RVCE_READWRITE(enc->cpb.res->cs_buf, enc->cpb.res->domains, 0); // encodeContextAddressHi - RVCE_CS(0x00000000); // encodeContextAddressLo + RVCE_READWRITE(enc->cpb.res->cs_buf, enc->cpb.res->domains, 0); // encodeContextAddressHi/Lo RVCE_END(); RVCE_BEGIN(0x05000004); // video bitstream buffer - RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, 0); // videoBitstreamRingAddressHi - RVCE_CS(0x00000000); // videoBitstreamRingAddressLo + RVCE_WRITE(enc->bs_handle, RADEON_DOMAIN_GTT, 0); // videoBitstreamRingAddressHi/Lo RVCE_CS(enc->bs_size); // videoBitstreamRingSize RVCE_END(); @@ -127,10 +125,10 @@ static void encode(struct rvce_encoder *enc) RVCE_CS(0x00000000); // insertAUD RVCE_CS(0x00000000); // endOfSequence RVCE_CS(0x00000000); // endOfStream - RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, 0); // inputPictureLumaAddressHi - RVCE_CS(enc->luma->level[0].offset); // inputPictureLumaAddressLo - RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, 0); // inputPictureChromaAddressHi - RVCE_CS(enc->chroma->level[0].offset); // inputPictureChromaAddressLo + RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, + enc->luma->level[0].offset); // inputPictureLumaAddressHi/Lo + RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM, + enc->chroma->level[0].offset); // inputPictureChromaAddressHi/Lo RVCE_CS(align(enc->luma->npix_y, 16)); // encInputFrameYPitch RVCE_CS(enc->luma->level[0].pitch_bytes); // encInputPicLumaPitch RVCE_CS(enc->chroma->level[0].pitch_bytes); // encInputPicChromaPitch |