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author | Michel Dänzer <michel.daenzer@amd.com> | 2013-04-30 16:34:10 +0200 |
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committer | Michel Dänzer <michel@daenzer.net> | 2013-05-28 09:55:46 +0200 |
commit | e369f40a9b73b905f2cb9c62aff606e0ec2bb3ef (patch) | |
tree | f2975d106da966855b260c168aba03196eb7acc8 /src/gallium/drivers/radeonsi/radeonsi_shader.c | |
parent | 08810ca9ef2adc0c094686b6cd8b565eecfa866d (diff) | |
download | external_mesa3d-e369f40a9b73b905f2cb9c62aff606e0ec2bb3ef.zip external_mesa3d-e369f40a9b73b905f2cb9c62aff606e0ec2bb3ef.tar.gz external_mesa3d-e369f40a9b73b905f2cb9c62aff606e0ec2bb3ef.tar.bz2 |
radeonsi: Fix hardware state for dual source blending
Set up CB_SHADER_MASK register according to pixel shader exports, and enable
some minimal state for colour buffer 1 in case dual source blending is used.
Diffstat (limited to 'src/gallium/drivers/radeonsi/radeonsi_shader.c')
-rw-r--r-- | src/gallium/drivers/radeonsi/radeonsi_shader.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c index 484f7ec..3e023f8 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_shader.c +++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c @@ -461,6 +461,8 @@ static void si_llvm_init_export_args(struct lp_build_tgsi_context *bld_base, else si_shader_ctx->shader->spi_shader_col_format |= V_028714_SPI_SHADER_32_ABGR << (4 * cbuf); + + si_shader_ctx->shader->cb_shader_mask |= 0xf << (4 * cbuf); } } @@ -806,6 +808,7 @@ static void si_llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base) si_shader_ctx->shader->spi_shader_col_format |= V_028714_SPI_SHADER_32_ABGR; + si_shader_ctx->shader->cb_shader_mask |= S_02823C_OUTPUT0_ENABLE(0xf); } /* Specify whether the EXEC mask represents the valid mask */ @@ -830,6 +833,8 @@ static void si_llvm_emit_epilogue(struct lp_build_tgsi_context * bld_base) si_shader_ctx->shader->spi_shader_col_format |= si_shader_ctx->shader->spi_shader_col_format << 4; + si_shader_ctx->shader->cb_shader_mask |= + si_shader_ctx->shader->cb_shader_mask << 4; } last_args[3] = lp_build_const_int32(base->gallivm, V_008DFC_SQ_EXP_MRT); |