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| author | Marek Olšák <marek.olsak@amd.com> | 2016-02-21 22:49:38 +0100 |
|---|---|---|
| committer | Marek Olšák <marek.olsak@amd.com> | 2016-03-09 15:02:27 +0100 |
| commit | b744ac9f44099e1b50d335dc9bdc0950ab7ec374 (patch) | |
| tree | 21955f1bf7815d7584cb01b617116e9139e2df93 /src/gallium/drivers/radeonsi/si_blit.c | |
| parent | 60c08aa90bce4c8766a747c8517f7ff6987937f0 (diff) | |
| download | external_mesa3d-b744ac9f44099e1b50d335dc9bdc0950ab7ec374.zip external_mesa3d-b744ac9f44099e1b50d335dc9bdc0950ab7ec374.tar.gz external_mesa3d-b744ac9f44099e1b50d335dc9bdc0950ab7ec374.tar.bz2 | |
radeonsi: allocate DCC in the same backing buffer as the texture
To allow sharing textures with DCC enabled.
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_blit.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_blit.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index 53c6705..60b9f7b 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -330,7 +330,7 @@ void si_decompress_color_textures(struct si_context *sctx, assert(view); tex = (struct r600_texture *)view->texture; - assert(tex->cmask.size || tex->fmask.size || tex->dcc_buffer); + assert(tex->cmask.size || tex->fmask.size || tex->dcc_offset); si_blit_decompress_color(&sctx->b.b, tex, view->u.tex.first_level, view->u.tex.last_level, @@ -483,7 +483,7 @@ static void si_decompress_subresource(struct pipe_context *ctx, si_blit_decompress_depth_in_place(sctx, rtex, true, level, level, first_layer, last_layer); - } else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_buffer) { + } else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_offset) { si_blit_decompress_color(ctx, rtex, level, level, first_layer, last_layer); } @@ -712,7 +712,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx, dst->surface.level[info->dst.level].mode >= RADEON_SURF_MODE_1D && !(dst->surface.flags & RADEON_SURF_SCANOUT) && (!dst->cmask.size || !dst->dirty_level_mask) && /* dst cannot be fast-cleared */ - !dst->dcc_buffer) { + !dst->dcc_offset) { si_blitter_begin(ctx, SI_COLOR_RESOLVE | (info->render_condition_enable ? 0 : SI_DISABLE_RENDER_COND)); util_blitter_custom_resolve_color(sctx->blitter, @@ -761,7 +761,7 @@ static void si_flush_resource(struct pipe_context *ctx, assert(res->target != PIPE_BUFFER); - if (!rtex->is_depth && (rtex->cmask.size || rtex->dcc_buffer)) { + if (!rtex->is_depth && (rtex->cmask.size || rtex->dcc_offset)) { si_blit_decompress_color(ctx, rtex, 0, res->last_level, 0, util_max_layer(res, 0)); } |