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authorNicolai Hähnle <nicolai.haehnle@amd.com>2016-09-09 10:08:11 +0200
committerNicolai Hähnle <nicolai.haehnle@amd.com>2016-10-10 10:36:42 +0200
commit77c81164bc1cd9ec98b32c40753f590791450434 (patch)
tree10f8468ceb6de6cbf56cba29a457a7098085a1e9 /src/gallium/drivers/radeonsi/si_compute.c
parent014bd4acb8b130fb31ec00f6125b8a91881bebdf (diff)
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radeonsi: support ARB_compute_variable_group_size
Not sure if it's possible to avoid programming the block size twice (once for the userdata and once for the dispatch). Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_compute.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_compute.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index 1d1df2f..e59bafe 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -601,11 +601,19 @@ static void si_setup_tgsi_grid(struct si_context *sctx,
radeon_emit(cs, 0);
}
} else {
+ struct si_compute *program = sctx->cs_shader_state.program;
+ bool variable_group_size =
+ program->shader.selector->info.properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0;
- radeon_set_sh_reg_seq(cs, grid_size_reg, 3);
+ radeon_set_sh_reg_seq(cs, grid_size_reg, variable_group_size ? 6 : 3);
radeon_emit(cs, info->grid[0]);
radeon_emit(cs, info->grid[1]);
radeon_emit(cs, info->grid[2]);
+ if (variable_group_size) {
+ radeon_emit(cs, info->block[0]);
+ radeon_emit(cs, info->block[1]);
+ radeon_emit(cs, info->block[2]);
+ }
}
}