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authorMarek Olšák <marek.olsak@amd.com>2016-04-22 10:26:28 +0200
committerMarek Olšák <marek.olsak@amd.com>2016-04-28 20:16:56 +0200
commitf564b61d33fd8fd23211e1762e2b04c25495b8fd (patch)
treeae0b805f23bb84a1be1187b6ccd3c875974e38fb /src/gallium/drivers/radeonsi/si_cp_dma.c
parentd273ce5259ff924b9c5ec1371872f4fdbac73fd5 (diff)
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radeonsi: rework clear_buffer flags
Changes: - don't flush DB for fast color clears - don't flush any caches for initial clears - remove the flag from si_copy_buffer, always assume shader coherency Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_cp_dma.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_cp_dma.c38
1 files changed, 22 insertions, 16 deletions
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index bca9cc5..cbb84b0 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -107,19 +107,26 @@ static void si_emit_cp_dma_clear_buffer(struct si_context *sctx,
}
}
-static unsigned get_flush_flags(struct si_context *sctx, bool is_framebuffer)
+static unsigned get_flush_flags(struct si_context *sctx, enum r600_coherency coher)
{
- if (is_framebuffer)
- return SI_CONTEXT_FLUSH_AND_INV_FRAMEBUFFER;
-
- return SI_CONTEXT_INV_SMEM_L1 |
- SI_CONTEXT_INV_VMEM_L1 |
- (sctx->b.chip_class == SI ? SI_CONTEXT_INV_GLOBAL_L2 : 0);
+ switch (coher) {
+ default:
+ case R600_COHERENCY_NONE:
+ return 0;
+ case R600_COHERENCY_SHADER:
+ return SI_CONTEXT_INV_SMEM_L1 |
+ SI_CONTEXT_INV_VMEM_L1 |
+ (sctx->b.chip_class == SI ? SI_CONTEXT_INV_GLOBAL_L2 : 0);
+ case R600_COHERENCY_CB_META:
+ return SI_CONTEXT_FLUSH_AND_INV_CB |
+ SI_CONTEXT_FLUSH_AND_INV_CB_META;
+ }
}
-static unsigned get_tc_l2_flag(struct si_context *sctx, bool is_framebuffer)
+static unsigned get_tc_l2_flag(struct si_context *sctx, enum r600_coherency coher)
{
- return is_framebuffer || sctx->b.chip_class == SI ? 0 : CIK_CP_DMA_USE_L2;
+ return coher == R600_COHERENCY_SHADER &&
+ sctx->b.chip_class >= CIK ? CIK_CP_DMA_USE_L2 : 0;
}
static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst,
@@ -159,11 +166,11 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst
static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
uint64_t offset, uint64_t size, unsigned value,
- bool is_framebuffer)
+ enum r600_coherency coher)
{
struct si_context *sctx = (struct si_context*)ctx;
- unsigned tc_l2_flag = get_tc_l2_flag(sctx, is_framebuffer);
- unsigned flush_flags = get_flush_flags(sctx, is_framebuffer);
+ unsigned tc_l2_flag = get_tc_l2_flag(sctx, coher);
+ unsigned flush_flags = get_flush_flags(sctx, coher);
if (!size)
return;
@@ -249,14 +256,13 @@ static void si_cp_dma_realign_engine(struct si_context *sctx, unsigned size)
void si_copy_buffer(struct si_context *sctx,
struct pipe_resource *dst, struct pipe_resource *src,
- uint64_t dst_offset, uint64_t src_offset, unsigned size,
- bool is_framebuffer)
+ uint64_t dst_offset, uint64_t src_offset, unsigned size)
{
uint64_t main_dst_offset, main_src_offset;
unsigned skipped_size = 0;
unsigned realign_size = 0;
- unsigned tc_l2_flag = get_tc_l2_flag(sctx, is_framebuffer);
- unsigned flush_flags = get_flush_flags(sctx, is_framebuffer);
+ unsigned tc_l2_flag = get_tc_l2_flag(sctx, R600_COHERENCY_SHADER);
+ unsigned flush_flags = get_flush_flags(sctx, R600_COHERENCY_SHADER);
if (!size)
return;