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| author | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-08-08 17:06:22 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <nicolai.haehnle@amd.com> | 2016-08-09 15:56:03 +0200 |
| commit | 2852dedaa0c45e426a53ba0042ecdb0f1b87950f (patch) | |
| tree | cbb83e361477770537dd0c76aee69f4ec6b41016 /src/gallium/drivers/radeonsi/si_descriptors.c | |
| parent | 76c4a3b567606d635c42809570a18089b4a41f9c (diff) | |
| download | external_mesa3d-2852dedaa0c45e426a53ba0042ecdb0f1b87950f.zip external_mesa3d-2852dedaa0c45e426a53ba0042ecdb0f1b87950f.tar.gz external_mesa3d-2852dedaa0c45e426a53ba0042ecdb0f1b87950f.tar.bz2 | |
radeonsi: flush TC L2 cache for indirect draw data
This fixes a bug when indirect draw data is generated by transform
feedback.
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_descriptors.c')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_descriptors.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 224cf35..7600671 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -1242,10 +1242,10 @@ static void si_set_streamout_targets(struct pipe_context *ctx, * and most other clients can use TC L2 as well, we don't need * to flush it. * - * The only case which requires flushing it is VGT DMA index - * fetching, which is a rare case. Thus, flag the TC L2 - * dirtiness in the resource and handle it when index fetching - * is used. + * The only cases which requires flushing it is VGT DMA index + * fetching (on <= CIK) and indirect draw data, which are rare + * cases. Thus, flag the TC L2 dirtiness in the resource and + * handle it at draw call time. */ for (i = 0; i < sctx->b.streamout.num_targets; i++) if (sctx->b.streamout.targets[i]) |