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authorMarek Olšák <marek.olsak@amd.com>2016-06-21 16:16:15 +0200
committerMarek Olšák <marek.olsak@amd.com>2016-06-29 20:12:00 +0200
commit9124457bff70686ea804d7e35fb63bea5db5a8a2 (patch)
tree9e9b1bdd9e42caab06096e6c446bb41632f5b1be /src/gallium/drivers/radeonsi/si_descriptors.c
parentfa7c927625ec1904a659edfdd677b5752165590a (diff)
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gallium/radeon: add state setup for a separate DCC buffer
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_descriptors.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 78d14af..d1cd3c4 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -304,6 +304,15 @@ static void si_sampler_view_add_buffer(struct si_context *sctx,
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, rres, usage,
r600_get_sampler_view_priority(rres));
+
+ if (resource->target != PIPE_BUFFER) {
+ struct r600_texture *rtex = (struct r600_texture*)resource;
+
+ if (rtex->dcc_separate_buffer)
+ radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx,
+ rtex->dcc_separate_buffer, usage,
+ RADEON_PRIO_DCC);
+ }
}
static void si_sampler_views_begin_new_cs(struct si_context *sctx,
@@ -352,7 +361,7 @@ void si_set_mutable_tex_desc_fields(struct r600_texture *tex,
if (tex->dcc_offset && tex->surface.level[first_level].dcc_enabled) {
state[6] |= S_008F28_COMPRESSION_EN(1);
- state[7] = (tex->resource.gpu_address +
+ state[7] = ((!tex->dcc_separate_buffer ? tex->resource.gpu_address : 0) +
tex->dcc_offset +
base_level_info->dcc_offset) >> 8;
}